A RISC-V Processor Design for Transparent Tracing

A RISC-V Processor Design for Transparent Tracing

Code instrumentation enables the observability of an embedded software system during its execution. A usage example of code instrumentation is the estimation of “worst-case execution time” using hybrid analysis. This analysis combines static code analysis with measurements of the execution time on t...

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Bibliographic Details
Main Authors:	Iván Gamino del Río, Agustín Martínez Hellín, Óscar R. Polo, Miguel Jiménez Arribas, Pablo Parra, Antonio da Silva, Jonatan Sánchez, Sebastián Sánchez
Format:	Article
Language:	English
Published:	MDPI AG 2020-11-01
Series:	Electronics
Subjects:	processor architecture trace mechanism critical software characterization worst-case execution time risc-v vhdl ip core instruction set architecture
Online Access:	https://www.mdpi.com/2079-9292/9/11/1873

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