CRYPHTOR: A Memory-Unified NTT-Based Hardware Accelerator for Post-Quantum CRYSTALS Algorithms
This paper presents the design and FPGA implementation of a hardware accelerator for the Post-Quantum CRYSTALS-Kyber and CRYSTALS-Dilithium algorithms, named CRYPHTOR (CRYstals Polynomial HW acceleraTOR). The proposed architecture includes a unified memory arrangement and dedicated ALUs for Kyber an...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
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IEEE
2024-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10439161/ |
| _version_ | 1797296345954910208 |
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| author | Stefano Di Matteo Ivan Sarno Sergio Saponara |
| author_facet | Stefano Di Matteo Ivan Sarno Sergio Saponara |
| author_sort | Stefano Di Matteo |
| collection | DOAJ |
| description | This paper presents the design and FPGA implementation of a hardware accelerator for the Post-Quantum CRYSTALS-Kyber and CRYSTALS-Dilithium algorithms, named CRYPHTOR (CRYstals Polynomial HW acceleraTOR). The proposed architecture includes a unified memory arrangement and dedicated ALUs for Kyber and Dilithium, capable of accelerating several polynomial operations such as Number Theoretic Transform (NTT), Inverse NTT, Coefficient-Wise Multiplication (CWM), modular addition and subtraction, modular reduction, and the multiply-accumulate operation. CRYPHTOR has been integrated into two SoCs: one based on a 64-bit RISC-V processor and the other on a 32-bit RISC-V microcontroller. In these configurations, up to 26x and 300x of speedup has been obtained for the NTT, and up to 30x and 140x of speedup for the matrix-vector multiplication compared to the software implementation running on the RISC-V processors. |
| first_indexed | 2024-03-07T22:03:18Z |
| format | Article |
| id | doaj.art-7cb28f5139824390b363c331df9ecfa2 |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-03-07T22:03:18Z |
| publishDate | 2024-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-7cb28f5139824390b363c331df9ecfa22024-02-24T00:01:20ZengIEEEIEEE Access2169-35362024-01-0112255012551110.1109/ACCESS.2024.336710910439161CRYPHTOR: A Memory-Unified NTT-Based Hardware Accelerator for Post-Quantum CRYSTALS AlgorithmsStefano Di Matteo0https://orcid.org/0000-0002-5711-432XIvan Sarno1https://orcid.org/0009-0003-6447-3587Sergio Saponara2https://orcid.org/0000-0001-6724-4219Department of Information Engineering, University of Pisa, Pisa, ItalyDepartment of Information Engineering, University of Pisa, Pisa, ItalyDepartment of Information Engineering, University of Pisa, Pisa, ItalyThis paper presents the design and FPGA implementation of a hardware accelerator for the Post-Quantum CRYSTALS-Kyber and CRYSTALS-Dilithium algorithms, named CRYPHTOR (CRYstals Polynomial HW acceleraTOR). The proposed architecture includes a unified memory arrangement and dedicated ALUs for Kyber and Dilithium, capable of accelerating several polynomial operations such as Number Theoretic Transform (NTT), Inverse NTT, Coefficient-Wise Multiplication (CWM), modular addition and subtraction, modular reduction, and the multiply-accumulate operation. CRYPHTOR has been integrated into two SoCs: one based on a 64-bit RISC-V processor and the other on a 32-bit RISC-V microcontroller. In these configurations, up to 26x and 300x of speedup has been obtained for the NTT, and up to 30x and 140x of speedup for the matrix-vector multiplication compared to the software implementation running on the RISC-V processors.https://ieeexplore.ieee.org/document/10439161/Module learning with errorsCRYSTALS-kyberCRYSTALS-dilithiumFPGApostquantum cryptography |
| spellingShingle | Stefano Di Matteo Ivan Sarno Sergio Saponara CRYPHTOR: A Memory-Unified NTT-Based Hardware Accelerator for Post-Quantum CRYSTALS Algorithms IEEE Access Module learning with errors CRYSTALS-kyber CRYSTALS-dilithium FPGA postquantum cryptography |
| title | CRYPHTOR: A Memory-Unified NTT-Based Hardware Accelerator for Post-Quantum CRYSTALS Algorithms |
| title_full | CRYPHTOR: A Memory-Unified NTT-Based Hardware Accelerator for Post-Quantum CRYSTALS Algorithms |
| title_fullStr | CRYPHTOR: A Memory-Unified NTT-Based Hardware Accelerator for Post-Quantum CRYSTALS Algorithms |
| title_full_unstemmed | CRYPHTOR: A Memory-Unified NTT-Based Hardware Accelerator for Post-Quantum CRYSTALS Algorithms |
| title_short | CRYPHTOR: A Memory-Unified NTT-Based Hardware Accelerator for Post-Quantum CRYSTALS Algorithms |
| title_sort | cryphtor a memory unified ntt based hardware accelerator for post quantum crystals algorithms |
| topic | Module learning with errors CRYSTALS-kyber CRYSTALS-dilithium FPGA postquantum cryptography |
| url | https://ieeexplore.ieee.org/document/10439161/ |
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