Improving the Characteristics of Multi-Level LUT-Based Mealy FSMs

Contemporary digital systems include many varying sequential blocks. In the article, we discuss a case when Mealy finite state machines (FSMs) describe the behavior of sequential blocks. In many cases, the performance is the most important characteristic of an FSM circuit. In the article, we propose...

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Main Authors: Alexander Barkalov, Larysa Titarenko, Kazimierz Krzywicki, Svetlana Saburova
Format: Article
Language:English
Published: MDPI AG 2020-11-01
Series:Electronics
Subjects:
Online Access:https://www.mdpi.com/2079-9292/9/11/1859
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author Alexander Barkalov
Larysa Titarenko
Kazimierz Krzywicki
Svetlana Saburova
author_facet Alexander Barkalov
Larysa Titarenko
Kazimierz Krzywicki
Svetlana Saburova
author_sort Alexander Barkalov
collection DOAJ
description Contemporary digital systems include many varying sequential blocks. In the article, we discuss a case when Mealy finite state machines (FSMs) describe the behavior of sequential blocks. In many cases, the performance is the most important characteristic of an FSM circuit. In the article, we propose a method which allows increasing the operating frequency of multi-level look-up table (LUT)-based Mealy FSMs. The main idea of the proposed approach is to use together two methods of structural decomposition. They are: (1) the known method of transformation of codes of collections of outputs into FSM state codes and (2) a new method of extension of state codes. The proposed approach allows producing FPGA-based FSMs having three levels of logic combined through the system of regular interconnections. Each function for every level of logic was implemented using a single LUT. An example of the synthesis of Mealy FSM with the proposed architecture is shown. The effectiveness of the proposed method was confirmed by the results of experimental studies based on standard benchmark FSMs. The research results show that FSM circuits based on the proposed approach have a higher operating frequency than can be obtained using other investigated methods. The maximum operating frequency is improved by an average of 3.18 to 12.57 percent. These improvements are accompanied by a small growth of LUT count.
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spelling doaj.art-7d6b2e148a304812b9fc0aade536457f2023-11-20T19:55:51ZengMDPI AGElectronics2079-92922020-11-01911185910.3390/electronics9111859Improving the Characteristics of Multi-Level LUT-Based Mealy FSMsAlexander Barkalov0Larysa Titarenko1Kazimierz Krzywicki2Svetlana Saburova3Institute of Metrology, Electronics and Computer Science, University of Zielona Góra, ul. Licealna 9, 65-417 Zielona Góra, PolandInstitute of Metrology, Electronics and Computer Science, University of Zielona Góra, ul. Licealna 9, 65-417 Zielona Góra, PolandDepartment of Technology, The Jacob of Paradies University, ul. Teatralna 25, 66-400 Gorzów Wielkopolski, PolandDepartment of Infocommunication Engineering, Faculty of Infocommunications, Kharkiv National University of Radio Electronics, Nauky Avenue 14, 61166 Kharkiv, UkraineContemporary digital systems include many varying sequential blocks. In the article, we discuss a case when Mealy finite state machines (FSMs) describe the behavior of sequential blocks. In many cases, the performance is the most important characteristic of an FSM circuit. In the article, we propose a method which allows increasing the operating frequency of multi-level look-up table (LUT)-based Mealy FSMs. The main idea of the proposed approach is to use together two methods of structural decomposition. They are: (1) the known method of transformation of codes of collections of outputs into FSM state codes and (2) a new method of extension of state codes. The proposed approach allows producing FPGA-based FSMs having three levels of logic combined through the system of regular interconnections. Each function for every level of logic was implemented using a single LUT. An example of the synthesis of Mealy FSM with the proposed architecture is shown. The effectiveness of the proposed method was confirmed by the results of experimental studies based on standard benchmark FSMs. The research results show that FSM circuits based on the proposed approach have a higher operating frequency than can be obtained using other investigated methods. The maximum operating frequency is improved by an average of 3.18 to 12.57 percent. These improvements are accompanied by a small growth of LUT count.https://www.mdpi.com/2079-9292/9/11/1859Mealy FSMstructural decompositionLUTFPGAextension of state codescollections of outputs
spellingShingle Alexander Barkalov
Larysa Titarenko
Kazimierz Krzywicki
Svetlana Saburova
Improving the Characteristics of Multi-Level LUT-Based Mealy FSMs
Electronics
Mealy FSM
structural decomposition
LUT
FPGA
extension of state codes
collections of outputs
title Improving the Characteristics of Multi-Level LUT-Based Mealy FSMs
title_full Improving the Characteristics of Multi-Level LUT-Based Mealy FSMs
title_fullStr Improving the Characteristics of Multi-Level LUT-Based Mealy FSMs
title_full_unstemmed Improving the Characteristics of Multi-Level LUT-Based Mealy FSMs
title_short Improving the Characteristics of Multi-Level LUT-Based Mealy FSMs
title_sort improving the characteristics of multi level lut based mealy fsms
topic Mealy FSM
structural decomposition
LUT
FPGA
extension of state codes
collections of outputs
url https://www.mdpi.com/2079-9292/9/11/1859
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