Design of 2-4 mixed-valued/eight-valued up-down counter on switch-level(2-4混值/8值绝热加减法计数器开关级设计)
通过对8值逻辑编码技术、绝热电路和加减法计数器工作原理及结构的研究，提出带进位/借位的2-4混值/8值绝热加减法计数器设计方案.首先，该方案以开关信号理论为指导，分别推导出2-4混值/8值触发型绝热正循环门和进位/借位电路的开关级结构式，然后利用多阈值NMOS管和交叉存贮结构实现相应电路，并在此基础上实现带进位/借位的2-4混值/8值加减法计数器.最后，PSPICE模拟验证所设计的电路具有正确的逻辑功能，在55.6 MHz工作频率下，与常规CMOS 2-4混值/8值加减法计数器相比，节省功耗约95%....
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| Format: | Article |
| Language: | zho |
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Zhejiang University Press
2011-07-01
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| Series: | Zhejiang Daxue xuebao. Lixue ban |
| Subjects: | |
| Online Access: | https://doi.org/10.3785/j.issn.1008-9497.2011.04.010 |
| _version_ | 1797236042671063040 |
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| author | GAOHong(高虹) WANGPeng-jun(汪鹏君) |
| author_facet | GAOHong(高虹) WANGPeng-jun(汪鹏君) |
| author_sort | GAOHong(高虹) |
| collection | DOAJ |
| description | 通过对8值逻辑编码技术、绝热电路和加减法计数器工作原理及结构的研究，提出带进位/借位的2-4混值/8值绝热加减法计数器设计方案.首先，该方案以开关信号理论为指导，分别推导出2-4混值/8值触发型绝热正循环门和进位/借位电路的开关级结构式，然后利用多阈值NMOS管和交叉存贮结构实现相应电路，并在此基础上实现带进位/借位的2-4混值/8值加减法计数器.最后，PSPICE模拟验证所设计的电路具有正确的逻辑功能，在55.6 MHz工作频率下，与常规CMOS 2-4混值/8值加减法计数器相比，节省功耗约95%. |
| first_indexed | 2024-04-24T16:57:34Z |
| format | Article |
| id | doaj.art-7f83667cb35c43008e1bd22b09b33c62 |
| institution | Directory Open Access Journal |
| issn | 1008-9497 |
| language | zho |
| last_indexed | 2024-04-24T16:57:34Z |
| publishDate | 2011-07-01 |
| publisher | Zhejiang University Press |
| record_format | Article |
| series | Zhejiang Daxue xuebao. Lixue ban |
| spelling | doaj.art-7f83667cb35c43008e1bd22b09b33c622024-03-29T01:58:29ZzhoZhejiang University PressZhejiang Daxue xuebao. Lixue ban1008-94972011-07-0138440941410.3785/j.issn.1008-9497.2011.04.010Design of 2-4 mixed-valued/eight-valued up-down counter on switch-level(2-4混值/8值绝热加减法计数器开关级设计)GAOHong(高虹)0WANGPeng-jun(汪鹏君)Institute of Circuits and Systems, Ningbo University, Ningbo 315211, Zhejiang Province, China(宁波大学 电路与系统研究所，浙江 宁波 315211)通过对8值逻辑编码技术、绝热电路和加减法计数器工作原理及结构的研究，提出带进位/借位的2-4混值/8值绝热加减法计数器设计方案.首先，该方案以开关信号理论为指导，分别推导出2-4混值/8值触发型绝热正循环门和进位/借位电路的开关级结构式，然后利用多阈值NMOS管和交叉存贮结构实现相应电路，并在此基础上实现带进位/借位的2-4混值/8值加减法计数器.最后，PSPICE模拟验证所设计的电路具有正确的逻辑功能，在55.6 MHz工作频率下，与常规CMOS 2-4混值/8值加减法计数器相比，节省功耗约95%.https://doi.org/10.3785/j.issn.1008-9497.2011.04.010开关信号理论2-4混值8值逻辑加减法计数器低功耗 |
| spellingShingle | GAOHong(高虹) WANGPeng-jun(汪鹏君) Design of 2-4 mixed-valued/eight-valued up-down counter on switch-level(2-4混值/8值绝热加减法计数器开关级设计) Zhejiang Daxue xuebao. Lixue ban 开关信号理论 2-4混值 8值逻辑 加减法计数器 低功耗 |
| title | Design of 2-4 mixed-valued/eight-valued up-down counter on switch-level(2-4混值/8值绝热加减法计数器开关级设计) |
| title_full | Design of 2-4 mixed-valued/eight-valued up-down counter on switch-level(2-4混值/8值绝热加减法计数器开关级设计) |
| title_fullStr | Design of 2-4 mixed-valued/eight-valued up-down counter on switch-level(2-4混值/8值绝热加减法计数器开关级设计) |
| title_full_unstemmed | Design of 2-4 mixed-valued/eight-valued up-down counter on switch-level(2-4混值/8值绝热加减法计数器开关级设计) |
| title_short | Design of 2-4 mixed-valued/eight-valued up-down counter on switch-level(2-4混值/8值绝热加减法计数器开关级设计) |
| title_sort | design of 2 4 mixed valued eight valued up down counter on switch level 2 4混值 8值绝热加减法计数器开关级设计 |
| topic | 开关信号理论 2-4混值 8值逻辑 加减法计数器 低功耗 |
| url | https://doi.org/10.3785/j.issn.1008-9497.2011.04.010 |
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