A Configurable Event-Driven Convolutional Node with Rate Saturation Mechanism for Modular ConvNet Systems Implementation
Convolutional Neural Networks (ConvNets) are a particular type of neural network often used for many applications like image recognition, video analysis or natural language processing. They are inspired by the human brain, following a specific organization of the connectivity pattern between layers...
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| Format: | Article |
| Language: | English |
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Frontiers Media S.A.
2018-02-01
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| Series: | Frontiers in Neuroscience |
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| Online Access: | http://journal.frontiersin.org/article/10.3389/fnins.2018.00063/full |
| _version_ | 1818057490557829120 |
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| author | Luis A. Camuñas-Mesa Yaisel L. Domínguez-Cordero Alejandro Linares-Barranco Teresa Serrano-Gotarredona Bernabé Linares-Barranco |
| author_facet | Luis A. Camuñas-Mesa Yaisel L. Domínguez-Cordero Alejandro Linares-Barranco Teresa Serrano-Gotarredona Bernabé Linares-Barranco |
| author_sort | Luis A. Camuñas-Mesa |
| collection | DOAJ |
| description | Convolutional Neural Networks (ConvNets) are a particular type of neural network often used for many applications like image recognition, video analysis or natural language processing. They are inspired by the human brain, following a specific organization of the connectivity pattern between layers of neurons known as receptive field. These networks have been traditionally implemented in software, but they are becoming more computationally expensive as they scale up, having limitations for real-time processing of high-speed stimuli. On the other hand, hardware implementations show difficulties to be used for different applications, due to their reduced flexibility. In this paper, we propose a fully configurable event-driven convolutional node with rate saturation mechanism that can be used to implement arbitrary ConvNets on FPGAs. This node includes a convolutional processing unit and a routing element which allows to build large 2D arrays where any multilayer structure can be implemented. The rate saturation mechanism emulates the refractory behavior in biological neurons, guaranteeing a minimum separation in time between consecutive events. A 4-layer ConvNet with 22 convolutional nodes trained for poker card symbol recognition has been implemented in a Spartan6 FPGA. This network has been tested with a stimulus where 40 poker cards were observed by a Dynamic Vision Sensor (DVS) in 1 s time. Different slow-down factors were applied to characterize the behavior of the system for high speed processing. For slow stimulus play-back, a 96% recognition rate is obtained with a power consumption of 0.85 mW. At maximum play-back speed, a traffic control mechanism downsamples the input stimulus, obtaining a recognition rate above 63% when less than 20% of the input events are processed, demonstrating the robustness of the network. |
| first_indexed | 2024-12-10T12:45:34Z |
| format | Article |
| id | doaj.art-83e5831b388e4342bbe4ec2d801aae15 |
| institution | Directory Open Access Journal |
| issn | 1662-453X |
| language | English |
| last_indexed | 2024-12-10T12:45:34Z |
| publishDate | 2018-02-01 |
| publisher | Frontiers Media S.A. |
| record_format | Article |
| series | Frontiers in Neuroscience |
| spelling | doaj.art-83e5831b388e4342bbe4ec2d801aae152022-12-22T01:48:25ZengFrontiers Media S.A.Frontiers in Neuroscience1662-453X2018-02-011210.3389/fnins.2018.00063325771A Configurable Event-Driven Convolutional Node with Rate Saturation Mechanism for Modular ConvNet Systems ImplementationLuis A. Camuñas-Mesa0Yaisel L. Domínguez-Cordero1Alejandro Linares-Barranco2Teresa Serrano-Gotarredona3Bernabé Linares-Barranco4Instituto de Microelectrónica de Sevilla (IMSE-CNM), CSIC y Universidad de Sevilla, Sevilla, SpainInstituto de Microelectrónica de Sevilla (IMSE-CNM), CSIC y Universidad de Sevilla, Sevilla, SpainDepartment of Computer Architectures, University of Sevilla, Sevilla, SpainInstituto de Microelectrónica de Sevilla (IMSE-CNM), CSIC y Universidad de Sevilla, Sevilla, SpainInstituto de Microelectrónica de Sevilla (IMSE-CNM), CSIC y Universidad de Sevilla, Sevilla, SpainConvolutional Neural Networks (ConvNets) are a particular type of neural network often used for many applications like image recognition, video analysis or natural language processing. They are inspired by the human brain, following a specific organization of the connectivity pattern between layers of neurons known as receptive field. These networks have been traditionally implemented in software, but they are becoming more computationally expensive as they scale up, having limitations for real-time processing of high-speed stimuli. On the other hand, hardware implementations show difficulties to be used for different applications, due to their reduced flexibility. In this paper, we propose a fully configurable event-driven convolutional node with rate saturation mechanism that can be used to implement arbitrary ConvNets on FPGAs. This node includes a convolutional processing unit and a routing element which allows to build large 2D arrays where any multilayer structure can be implemented. The rate saturation mechanism emulates the refractory behavior in biological neurons, guaranteeing a minimum separation in time between consecutive events. A 4-layer ConvNet with 22 convolutional nodes trained for poker card symbol recognition has been implemented in a Spartan6 FPGA. This network has been tested with a stimulus where 40 poker cards were observed by a Dynamic Vision Sensor (DVS) in 1 s time. Different slow-down factors were applied to characterize the behavior of the system for high speed processing. For slow stimulus play-back, a 96% recognition rate is obtained with a power consumption of 0.85 mW. At maximum play-back speed, a traffic control mechanism downsamples the input stimulus, obtaining a recognition rate above 63% when less than 20% of the input events are processed, demonstrating the robustness of the network.http://journal.frontiersin.org/article/10.3389/fnins.2018.00063/fullconvolutional neural networksneuromorphic visionAddress Event Representation (AER)event-driven processingneural network hardwareReconfigurable Networks |
| spellingShingle | Luis A. Camuñas-Mesa Yaisel L. Domínguez-Cordero Alejandro Linares-Barranco Teresa Serrano-Gotarredona Bernabé Linares-Barranco A Configurable Event-Driven Convolutional Node with Rate Saturation Mechanism for Modular ConvNet Systems Implementation Frontiers in Neuroscience convolutional neural networks neuromorphic vision Address Event Representation (AER) event-driven processing neural network hardware Reconfigurable Networks |
| title | A Configurable Event-Driven Convolutional Node with Rate Saturation Mechanism for Modular ConvNet Systems Implementation |
| title_full | A Configurable Event-Driven Convolutional Node with Rate Saturation Mechanism for Modular ConvNet Systems Implementation |
| title_fullStr | A Configurable Event-Driven Convolutional Node with Rate Saturation Mechanism for Modular ConvNet Systems Implementation |
| title_full_unstemmed | A Configurable Event-Driven Convolutional Node with Rate Saturation Mechanism for Modular ConvNet Systems Implementation |
| title_short | A Configurable Event-Driven Convolutional Node with Rate Saturation Mechanism for Modular ConvNet Systems Implementation |
| title_sort | configurable event driven convolutional node with rate saturation mechanism for modular convnet systems implementation |
| topic | convolutional neural networks neuromorphic vision Address Event Representation (AER) event-driven processing neural network hardware Reconfigurable Networks |
| url | http://journal.frontiersin.org/article/10.3389/fnins.2018.00063/full |
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