Power Estimation of Pipeline FFT Processors

Pipeline FFT processors are used in mobile communication systems and in particular in OFDM-based systems. This paper presents a method for power analysis of pipeline FFT processors. This method applies to various architectures with different radices. It also presents a method for mapping utilization...

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Main Authors: S. Reza TALEBIYAN, Saied HOSSEINI-KHAYAT
Format: Article
Language:English
Published: Universitatea Dunarea de Jos 2009-07-01
Series:Analele Universităţii "Dunărea de Jos" Galaţi: Fascicula III, Electrotehnică, Electronică, Automatică, Informatică
Subjects:
Online Access:http://www.ann.ugal.ro/eeai/archives/2009/Lucrare-06-TALEBIYAN.pdf
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author S. Reza TALEBIYAN
Saied HOSSEINI-KHAYAT
author_facet S. Reza TALEBIYAN
Saied HOSSEINI-KHAYAT
author_sort S. Reza TALEBIYAN
collection DOAJ
description Pipeline FFT processors are used in mobile communication systems and in particular in OFDM-based systems. This paper presents a method for power analysis of pipeline FFT processors. This method applies to various architectures with different radices. It also presents a method for mapping utilization rate onto clock-gating, which results in efficient power consumption.
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series Analele Universităţii "Dunărea de Jos" Galaţi: Fascicula III, Electrotehnică, Electronică, Automatică, Informatică
spelling doaj.art-840afc604967439fa08df0eddbcf53192022-12-22T03:19:52ZengUniversitatea Dunarea de JosAnalele Universităţii "Dunărea de Jos" Galaţi: Fascicula III, Electrotehnică, Electronică, Automatică, Informatică1221-454X2009-07-013213741Power Estimation of Pipeline FFT ProcessorsS. Reza TALEBIYANSaied HOSSEINI-KHAYATPipeline FFT processors are used in mobile communication systems and in particular in OFDM-based systems. This paper presents a method for power analysis of pipeline FFT processors. This method applies to various architectures with different radices. It also presents a method for mapping utilization rate onto clock-gating, which results in efficient power consumption.http://www.ann.ugal.ro/eeai/archives/2009/Lucrare-06-TALEBIYAN.pdfPipeline FFT processorpower analysisutilization rateclock-gating
spellingShingle S. Reza TALEBIYAN
Saied HOSSEINI-KHAYAT
Power Estimation of Pipeline FFT Processors
Analele Universităţii "Dunărea de Jos" Galaţi: Fascicula III, Electrotehnică, Electronică, Automatică, Informatică
Pipeline FFT processor
power analysis
utilization rate
clock-gating
title Power Estimation of Pipeline FFT Processors
title_full Power Estimation of Pipeline FFT Processors
title_fullStr Power Estimation of Pipeline FFT Processors
title_full_unstemmed Power Estimation of Pipeline FFT Processors
title_short Power Estimation of Pipeline FFT Processors
title_sort power estimation of pipeline fft processors
topic Pipeline FFT processor
power analysis
utilization rate
clock-gating
url http://www.ann.ugal.ro/eeai/archives/2009/Lucrare-06-TALEBIYAN.pdf
work_keys_str_mv AT srezatalebiyan powerestimationofpipelinefftprocessors
AT saiedhosseinikhayat powerestimationofpipelinefftprocessors