| Summary: | Recently, a phase-transition field effect transistor (phase-FET) integrated with a phase-transition material (PTM) is attracting attention as a steep switching device, and attempts to solve the power consumption limitation of conventional CMOS using various PTMs are continuing. In order to utilize the phase-FET, it is essential to design an appropriate device and circuit characteristics by carefully considering the close correlation between the baseline-FET and the PTM and the hysteresis characteristics caused by the phase-transition. In this work, by integrating various PTMs according to the baseline FETs in various technology nodes, the logic and SRAM characteristics implemented the phase-FET were investigated, and the appropriate PTM and the electrical characteristic target required for the PTM were presented through systematic analysis. As a result, it was confirmed that single crystalline vanadium di-oxide (SC VO2) has characteristics suitable for constructing phase-FETs compared to other candidate PTMs in 32 nm planar FET, 7 nm Fin-FET, and 3 nm gate-all-around FET technology nodes. As a result of benchmarking with conventional-FET at each technology node, in the case of logic, the speed is 26.15% (32 nm), 20.26% (7 nm), and 20.05% (3 nm), and in the case of memory, standby power, read stability and write time are improved.
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