Design and Programming for Multicore machines: An Empirical study on time and effort required by programmer

As the demand for high-performance computing continues to surge, harnessing the full potential of multicore architectures has become paramount. This paper explores a pragmatic approach to transition from sequential to parallel programming, capitalizing on the computational prowess of modern hardware...

Full description

Bibliographic Details
Main Authors: Vinay T.R., Satish E.G., Megha J.
Format: Article
Language:English
Published: EDP Sciences 2023-01-01
Series:ITM Web of Conferences
Subjects:
Online Access:https://www.itm-conferences.org/articles/itmconf/pdf/2023/07/itmconf_icaect2023_01016.pdf
_version_ 1797343962326892544
author Vinay T.R.
Satish E.G.
Megha J.
author_facet Vinay T.R.
Satish E.G.
Megha J.
author_sort Vinay T.R.
collection DOAJ
description As the demand for high-performance computing continues to surge, harnessing the full potential of multicore architectures has become paramount. This paper explores a pragmatic approach to transition from sequential to parallel programming, capitalizing on the computational prowess of modern hardware systems. Recognizing the challenges of enforcing parallelism in early software development phases, we advocate for a focus on the implementation stage, where architects, designers, and developers can seamlessly introduce parallel constructs while preserving software integrity. To facilitate this paradigm shift, we introduce the “SDLC model with Parallel Constructs,” a modified Software Development Life Cycle (SDLC) framework comprising additional phases: “Parallel Constructs” and “Test Parallel Constructs.” This model empowers development teams to integrate parallel computing efficiently, enhancing performance and maintaining a structured development process. Our observations reveal intriguing dynamics. Initially, the single-threaded program outperforms its parallel counterpart for smaller datasets, but as data sizes grow, the parallel version demonstrates superior performance. We underscore the pivotal role of available CPU cores and task partitioning in determining efficiency. Our analysis also evaluates the programmer’s effort, measured by lines of code, needed for the transition. Leveraging OpenMP constructs streamlines this transition, reducing programming complexity.
first_indexed 2024-03-08T10:55:24Z
format Article
id doaj.art-86a2cce6ba4d46bcb447ef765df0f90b
institution Directory Open Access Journal
issn 2271-2097
language English
last_indexed 2024-03-08T10:55:24Z
publishDate 2023-01-01
publisher EDP Sciences
record_format Article
series ITM Web of Conferences
spelling doaj.art-86a2cce6ba4d46bcb447ef765df0f90b2024-01-26T16:34:27ZengEDP SciencesITM Web of Conferences2271-20972023-01-01570101610.1051/itmconf/20235701016itmconf_icaect2023_01016Design and Programming for Multicore machines: An Empirical study on time and effort required by programmerVinay T.R.0https://orcid.org/0000-0001-7038-1943Satish E.G.1Megha J.2Ramaiah Institute of TechnologyNitte Meenakshi Institute of TechnologyRamaiah Institute of TechnologyAs the demand for high-performance computing continues to surge, harnessing the full potential of multicore architectures has become paramount. This paper explores a pragmatic approach to transition from sequential to parallel programming, capitalizing on the computational prowess of modern hardware systems. Recognizing the challenges of enforcing parallelism in early software development phases, we advocate for a focus on the implementation stage, where architects, designers, and developers can seamlessly introduce parallel constructs while preserving software integrity. To facilitate this paradigm shift, we introduce the “SDLC model with Parallel Constructs,” a modified Software Development Life Cycle (SDLC) framework comprising additional phases: “Parallel Constructs” and “Test Parallel Constructs.” This model empowers development teams to integrate parallel computing efficiently, enhancing performance and maintaining a structured development process. Our observations reveal intriguing dynamics. Initially, the single-threaded program outperforms its parallel counterpart for smaller datasets, but as data sizes grow, the parallel version demonstrates superior performance. We underscore the pivotal role of available CPU cores and task partitioning in determining efficiency. Our analysis also evaluates the programmer’s effort, measured by lines of code, needed for the transition. Leveraging OpenMP constructs streamlines this transition, reducing programming complexity.https://www.itm-conferences.org/articles/itmconf/pdf/2023/07/itmconf_icaect2023_01016.pdfmulticore machineparallel programmingsoftware development life cycleeffortparallel constructs.
spellingShingle Vinay T.R.
Satish E.G.
Megha J.
Design and Programming for Multicore machines: An Empirical study on time and effort required by programmer
ITM Web of Conferences
multicore machine
parallel programming
software development life cycle
effort
parallel constructs.
title Design and Programming for Multicore machines: An Empirical study on time and effort required by programmer
title_full Design and Programming for Multicore machines: An Empirical study on time and effort required by programmer
title_fullStr Design and Programming for Multicore machines: An Empirical study on time and effort required by programmer
title_full_unstemmed Design and Programming for Multicore machines: An Empirical study on time and effort required by programmer
title_short Design and Programming for Multicore machines: An Empirical study on time and effort required by programmer
title_sort design and programming for multicore machines an empirical study on time and effort required by programmer
topic multicore machine
parallel programming
software development life cycle
effort
parallel constructs.
url https://www.itm-conferences.org/articles/itmconf/pdf/2023/07/itmconf_icaect2023_01016.pdf
work_keys_str_mv AT vinaytr designandprogrammingformulticoremachinesanempiricalstudyontimeandeffortrequiredbyprogrammer
AT satisheg designandprogrammingformulticoremachinesanempiricalstudyontimeandeffortrequiredbyprogrammer
AT meghaj designandprogrammingformulticoremachinesanempiricalstudyontimeandeffortrequiredbyprogrammer