A 0.3 V, Rail-to-Rail, Ultralow-Power, Non-Tailed, Body-Driven, Sub-Threshold Amplifier
A novel, inverter-based, fully differential, body-driven, rail-to-rail, input stage topology is proposed in this paper. The input stage exploits a replica bias control loop to set the common mode current and a common mode feed-forward strategy to set its output common mode voltage. This novel cell i...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
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MDPI AG
2021-03-01
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| Series: | Applied Sciences |
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| Online Access: | https://www.mdpi.com/2076-3417/11/6/2528 |
| _version_ | 1797541687163092992 |
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| author | Francesco Centurelli Riccardo Della Sala Giuseppe Scotti Alessandro Trifiletti |
| author_facet | Francesco Centurelli Riccardo Della Sala Giuseppe Scotti Alessandro Trifiletti |
| author_sort | Francesco Centurelli |
| collection | DOAJ |
| description | A novel, inverter-based, fully differential, body-driven, rail-to-rail, input stage topology is proposed in this paper. The input stage exploits a replica bias control loop to set the common mode current and a common mode feed-forward strategy to set its output common mode voltage. This novel cell is used to build an ultralow voltage (ULV), ultralow-power (ULP), two-stage, unbuffered operational amplifier. A dual path compensation strategy is exploited to improve the frequency response of the circuit. The amplifier has been designed in a commercial 130 nm CMOS technology from STMicroelectronics and is able to operate with a nominal supply voltage of 0.3 V and a power consumption as low as 11.4 nW, while showing about 65 dB gain, a gain bandwidth product around 3.6 kHz with a 50 pF load capacitance and a common mode rejection ratio (CMRR) in excess of 60 dB. Transistor-level simulations show that the proposed circuit outperforms most of the state of the art amplifiers in terms of the main figures of merit. The results of extensive parametric and Monte Carlo simulations have demonstrated the robustness of the proposed circuit to PVT and mismatch variations. |
| first_indexed | 2024-03-10T13:19:25Z |
| format | Article |
| id | doaj.art-873931ee882049a4801ea91e0fc84a23 |
| institution | Directory Open Access Journal |
| issn | 2076-3417 |
| language | English |
| last_indexed | 2024-03-10T13:19:25Z |
| publishDate | 2021-03-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Applied Sciences |
| spelling | doaj.art-873931ee882049a4801ea91e0fc84a232023-11-21T10:08:55ZengMDPI AGApplied Sciences2076-34172021-03-01116252810.3390/app11062528A 0.3 V, Rail-to-Rail, Ultralow-Power, Non-Tailed, Body-Driven, Sub-Threshold AmplifierFrancesco Centurelli0Riccardo Della Sala1Giuseppe Scotti2Alessandro Trifiletti3Dipartimento di Ingegneria dell’Informazione, Elettronica e Telecomunicazioni (DIET), Università di Roma La Sapienza, 00184 Roma, ItalyDipartimento di Ingegneria dell’Informazione, Elettronica e Telecomunicazioni (DIET), Università di Roma La Sapienza, 00184 Roma, ItalyDipartimento di Ingegneria dell’Informazione, Elettronica e Telecomunicazioni (DIET), Università di Roma La Sapienza, 00184 Roma, ItalyDipartimento di Ingegneria dell’Informazione, Elettronica e Telecomunicazioni (DIET), Università di Roma La Sapienza, 00184 Roma, ItalyA novel, inverter-based, fully differential, body-driven, rail-to-rail, input stage topology is proposed in this paper. The input stage exploits a replica bias control loop to set the common mode current and a common mode feed-forward strategy to set its output common mode voltage. This novel cell is used to build an ultralow voltage (ULV), ultralow-power (ULP), two-stage, unbuffered operational amplifier. A dual path compensation strategy is exploited to improve the frequency response of the circuit. The amplifier has been designed in a commercial 130 nm CMOS technology from STMicroelectronics and is able to operate with a nominal supply voltage of 0.3 V and a power consumption as low as 11.4 nW, while showing about 65 dB gain, a gain bandwidth product around 3.6 kHz with a 50 pF load capacitance and a common mode rejection ratio (CMRR) in excess of 60 dB. Transistor-level simulations show that the proposed circuit outperforms most of the state of the art amplifiers in terms of the main figures of merit. The results of extensive parametric and Monte Carlo simulations have demonstrated the robustness of the proposed circuit to PVT and mismatch variations.https://www.mdpi.com/2076-3417/11/6/2528body-drivenultralow voltageultralow-poweroperational transconductance amplifiernon-tailed differential pairinverter-based |
| spellingShingle | Francesco Centurelli Riccardo Della Sala Giuseppe Scotti Alessandro Trifiletti A 0.3 V, Rail-to-Rail, Ultralow-Power, Non-Tailed, Body-Driven, Sub-Threshold Amplifier Applied Sciences body-driven ultralow voltage ultralow-power operational transconductance amplifier non-tailed differential pair inverter-based |
| title | A 0.3 V, Rail-to-Rail, Ultralow-Power, Non-Tailed, Body-Driven, Sub-Threshold Amplifier |
| title_full | A 0.3 V, Rail-to-Rail, Ultralow-Power, Non-Tailed, Body-Driven, Sub-Threshold Amplifier |
| title_fullStr | A 0.3 V, Rail-to-Rail, Ultralow-Power, Non-Tailed, Body-Driven, Sub-Threshold Amplifier |
| title_full_unstemmed | A 0.3 V, Rail-to-Rail, Ultralow-Power, Non-Tailed, Body-Driven, Sub-Threshold Amplifier |
| title_short | A 0.3 V, Rail-to-Rail, Ultralow-Power, Non-Tailed, Body-Driven, Sub-Threshold Amplifier |
| title_sort | 0 3 v rail to rail ultralow power non tailed body driven sub threshold amplifier |
| topic | body-driven ultralow voltage ultralow-power operational transconductance amplifier non-tailed differential pair inverter-based |
| url | https://www.mdpi.com/2076-3417/11/6/2528 |
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