The influence of ZnO layer thickness on the performance and electrical bias stress instability in ZnO thin film transistors

Thin Film Transistors (TFTs) are the active elements for future large area electronic applications, in which low cost, low temperature processes and optical transparency are required. Zinc oxide (ZnO) thin film transistors (TFTs) on SiO _2 /n+-Si substrate are fabricated with the channel thicknesses...

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Bibliographic Details
Main Authors: Divine Khan Ngwashi, Thomas Attia Mih, Richard B M Cross
Format: Article
Language:English
Published: IOP Publishing 2020-01-01
Series:Materials Research Express
Subjects:
Online Access:https://doi.org/10.1088/2053-1591/ab6eee
Description
Summary:Thin Film Transistors (TFTs) are the active elements for future large area electronic applications, in which low cost, low temperature processes and optical transparency are required. Zinc oxide (ZnO) thin film transistors (TFTs) on SiO _2 /n+-Si substrate are fabricated with the channel thicknesses ranging from 20 nm to 60 nm. It is found that both the performance and gate bias stress related instabilities of the ZnO TFTs fabricated were influenced by the thickness of ZnO active channel layer. The effective mobility was found to improve with increasing ZnO thickness by up to an order in magnitude within the thickness range investigated (20–60 nm). However, thinner films were found to exhibit greater stability in threshold voltage and turn-on voltage shifts with respect to both positive and negative gate bias stress. It was also observed that both the turn on voltage (V _on ) and the threshold voltage (V _T ) decrease with increasing channel thickness. Moreover, the variations in subthreshold slope (S) with ZnO thickness as well as variations in V _T and V _on suggest a possible dependence of trap states in the ZnO on the ZnO thickness. This is further correlated by the dependence of V _T and V _on instabilities with gate bias stress.
ISSN:2053-1591