Parallel Architecture Prototype for 60 GHz High Data Rate Wireless Single Carrier Receiver
Nowadays a huge attention of the academia and research teams is attracted to the potential of the usage of the 60 GHz frequency band in the wireless communications. The use of the 60GHz frequency band offers great possibilities for wide variety of applications that are yet to be implemented. These a...
| Main Authors: | , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Anhalt University of Applied Sciences
2014-03-01
|
| Series: | Proceedings of the International Conference on Applied Innovations in IT |
| Subjects: | |
| Online Access: | https://icaiit.org/paper.php?paper=2nd_ICAIIT/8 |
| _version_ | 1797803473592385536 |
|---|---|
| author | Tatjana Chavdarova Aristotel Tentov Marija Kalendar |
| author_facet | Tatjana Chavdarova Aristotel Tentov Marija Kalendar |
| author_sort | Tatjana Chavdarova |
| collection | DOAJ |
| description | Nowadays a huge attention of the academia and research teams is attracted to the potential of the usage of the 60 GHz frequency band in the wireless communications. The use of the 60GHz frequency band offers great possibilities for wide variety of applications that are yet to be implemented. These applications also imply huge implementation challenges. Such example is building a high data rate transceiver which at the same time would have very low power consumption. In this paper we present a prototype of Single Carrier - SC
transceiver system, illustrating a brief overview of the baseband design, emphasizing the most important decisions that need to be done. A brief overview of the possible approaches when implementing the equalizer, as the most complex module in the SC transceiver, is also presented. The main focus of this paper is to suggest a parallel architecture for the receiver in a Single Carrier communication system. This would provide higher data rates that the communication system can achieve, for a price of higher power consumption.
The suggested architecture of such receiver is illustrated in this paper, giving the results of its implementation in comparison with its corresponding serial implementation. |
| first_indexed | 2024-03-13T05:22:23Z |
| format | Article |
| id | doaj.art-8a029042b6c64c209b1329e141316404 |
| institution | Directory Open Access Journal |
| issn | 2199-8876 |
| language | English |
| last_indexed | 2024-03-13T05:22:23Z |
| publishDate | 2014-03-01 |
| publisher | Anhalt University of Applied Sciences |
| record_format | Article |
| series | Proceedings of the International Conference on Applied Innovations in IT |
| spelling | doaj.art-8a029042b6c64c209b1329e1413164042023-06-15T12:39:48ZengAnhalt University of Applied SciencesProceedings of the International Conference on Applied Innovations in IT2199-88762014-03-0121495610.13142/kt10002.08Parallel Architecture Prototype for 60 GHz High Data Rate Wireless Single Carrier ReceiverTatjana Chavdarova0Aristotel Tentov1Marija Kalendar2https://orcid.org/0000-0002-4226-0690SS. Cyril and Methodius University - Faculty of Electrical Engineering and Information Technologies Karpos II bb, PO Box 574, 1000 Skopje, MacedoniaSS. Cyril and Methodius University - Faculty of Electrical Engineering and Information Technologies Karpos II bb, PO Box 574, 1000 Skopje, MacedoniaSS. Cyril and Methodius University - Faculty of Electrical Engineering and Information Technologies Karpos II bb, PO Box 574, 1000 Skopje, MacedoniaNowadays a huge attention of the academia and research teams is attracted to the potential of the usage of the 60 GHz frequency band in the wireless communications. The use of the 60GHz frequency band offers great possibilities for wide variety of applications that are yet to be implemented. These applications also imply huge implementation challenges. Such example is building a high data rate transceiver which at the same time would have very low power consumption. In this paper we present a prototype of Single Carrier - SC transceiver system, illustrating a brief overview of the baseband design, emphasizing the most important decisions that need to be done. A brief overview of the possible approaches when implementing the equalizer, as the most complex module in the SC transceiver, is also presented. The main focus of this paper is to suggest a parallel architecture for the receiver in a Single Carrier communication system. This would provide higher data rates that the communication system can achieve, for a price of higher power consumption. The suggested architecture of such receiver is illustrated in this paper, giving the results of its implementation in comparison with its corresponding serial implementation. https://icaiit.org/paper.php?paper=2nd_ICAIIT/860 ghzmillimeter wavesingle carriervhdl implementationfrequency domain equalizationwireless personal area network |
| spellingShingle | Tatjana Chavdarova Aristotel Tentov Marija Kalendar Parallel Architecture Prototype for 60 GHz High Data Rate Wireless Single Carrier Receiver Proceedings of the International Conference on Applied Innovations in IT 60 ghz millimeter wave single carrier vhdl implementation frequency domain equalization wireless personal area network |
| title | Parallel Architecture Prototype for 60 GHz High Data Rate Wireless Single Carrier Receiver |
| title_full | Parallel Architecture Prototype for 60 GHz High Data Rate Wireless Single Carrier Receiver |
| title_fullStr | Parallel Architecture Prototype for 60 GHz High Data Rate Wireless Single Carrier Receiver |
| title_full_unstemmed | Parallel Architecture Prototype for 60 GHz High Data Rate Wireless Single Carrier Receiver |
| title_short | Parallel Architecture Prototype for 60 GHz High Data Rate Wireless Single Carrier Receiver |
| title_sort | parallel architecture prototype for 60 ghz high data rate wireless single carrier receiver |
| topic | 60 ghz millimeter wave single carrier vhdl implementation frequency domain equalization wireless personal area network |
| url | https://icaiit.org/paper.php?paper=2nd_ICAIIT/8 |
| work_keys_str_mv | AT tatjanachavdarova parallelarchitectureprototypefor60ghzhighdataratewirelesssinglecarrierreceiver AT aristoteltentov parallelarchitectureprototypefor60ghzhighdataratewirelesssinglecarrierreceiver AT marijakalendar parallelarchitectureprototypefor60ghzhighdataratewirelesssinglecarrierreceiver |