Approximate Triple Modular Redundancy: A Survey
In recent years, approximate computing (AC) has attracted attention owing to its tradeoff between the exactness of computations and performance gains. AC has also been probed for the technique of Triple modular redundancy (TMR). TMR is a well-known fault masking methodology, with associated overhead...
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| Format: | Article |
| Language: | English |
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IEEE
2020-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/9151958/ |
| _version_ | 1818725738200694784 |
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| author | Tooba Arifeen Abdus Sami Hassan Jeong-A Lee |
| author_facet | Tooba Arifeen Abdus Sami Hassan Jeong-A Lee |
| author_sort | Tooba Arifeen |
| collection | DOAJ |
| description | In recent years, approximate computing (AC) has attracted attention owing to its tradeoff between the exactness of computations and performance gains. AC has also been probed for the technique of Triple modular redundancy (TMR). TMR is a well-known fault masking methodology, with associated overheads, widely used in systems of different nature and at different levels. E.g.: layout-level, gate-level, HW-module level, software. At hardware level, through exploitation of AC the 200% area overhead problem due to triplication of the original modules in TMR can be reduced. By approximating the modules of TMR while ensuring that at least two of the approximate modules do not differ from the original module for every input vector, the facilitation of fault masking can lead to overhead reduction. Hence, approximate TMR (ATMR) aims to achieve cost-effective reliability. Nevertheless, due to the extensive search space, computational complexity, and principal fault masking function of ATMR, designing an ATMR is a challenging task. An ATMR technique must be scalable so that it can be easily adopted by circuits having large number of inputs and the extraction of ATMR modules remains computationally inexpensive. Compared with TMR, due to the inclusion of approximations, ATMR is more vulnerable to errors, and hence, the design technique must ensure awareness of input-criticality. To the best of the authors' knowledge, none of the existing survey articles on AC has reported on ATMR. Therefore, in this work, ATMR design techniques are thoroughly surveyed and qualitatively compared. Moreover, design considerations and challenges for designing ATMR are discussed. |
| first_indexed | 2024-12-17T21:47:05Z |
| format | Article |
| id | doaj.art-8c208af549ef4bc3b6668c968dce7f97 |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-12-17T21:47:05Z |
| publishDate | 2020-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-8c208af549ef4bc3b6668c968dce7f972022-12-21T21:31:26ZengIEEEIEEE Access2169-35362020-01-01813985113986710.1109/ACCESS.2020.30126739151958Approximate Triple Modular Redundancy: A SurveyTooba Arifeen0Abdus Sami Hassan1https://orcid.org/0000-0001-5392-3595Jeong-A Lee2https://orcid.org/0000-0002-5166-0629Department of Computer Engineering, Chosun University, Gwangju, South KoreaDepartment of Computer Engineering, Chosun University, Gwangju, South KoreaDepartment of Computer Engineering, Chosun University, Gwangju, South KoreaIn recent years, approximate computing (AC) has attracted attention owing to its tradeoff between the exactness of computations and performance gains. AC has also been probed for the technique of Triple modular redundancy (TMR). TMR is a well-known fault masking methodology, with associated overheads, widely used in systems of different nature and at different levels. E.g.: layout-level, gate-level, HW-module level, software. At hardware level, through exploitation of AC the 200% area overhead problem due to triplication of the original modules in TMR can be reduced. By approximating the modules of TMR while ensuring that at least two of the approximate modules do not differ from the original module for every input vector, the facilitation of fault masking can lead to overhead reduction. Hence, approximate TMR (ATMR) aims to achieve cost-effective reliability. Nevertheless, due to the extensive search space, computational complexity, and principal fault masking function of ATMR, designing an ATMR is a challenging task. An ATMR technique must be scalable so that it can be easily adopted by circuits having large number of inputs and the extraction of ATMR modules remains computationally inexpensive. Compared with TMR, due to the inclusion of approximations, ATMR is more vulnerable to errors, and hence, the design technique must ensure awareness of input-criticality. To the best of the authors' knowledge, none of the existing survey articles on AC has reported on ATMR. Therefore, in this work, ATMR design techniques are thoroughly surveyed and qualitatively compared. Moreover, design considerations and challenges for designing ATMR are discussed.https://ieeexplore.ieee.org/document/9151958/Approximate computingfault tolerancesingle event upsetsoft errorsATMRperformance tradeoffs |
| spellingShingle | Tooba Arifeen Abdus Sami Hassan Jeong-A Lee Approximate Triple Modular Redundancy: A Survey IEEE Access Approximate computing fault tolerance single event upset soft errors ATMR performance tradeoffs |
| title | Approximate Triple Modular Redundancy: A Survey |
| title_full | Approximate Triple Modular Redundancy: A Survey |
| title_fullStr | Approximate Triple Modular Redundancy: A Survey |
| title_full_unstemmed | Approximate Triple Modular Redundancy: A Survey |
| title_short | Approximate Triple Modular Redundancy: A Survey |
| title_sort | approximate triple modular redundancy a survey |
| topic | Approximate computing fault tolerance single event upset soft errors ATMR performance tradeoffs |
| url | https://ieeexplore.ieee.org/document/9151958/ |
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