Mathematical Circuit Root Simplification Using an Ensemble Heuristic–Metaheuristic Algorithm
Symbolic pole/zero analysis is a crucial step in designing an analog operational amplifier. Generally, a simplified symbolic analysis of analog circuits suffers from NP-hardness, i.e., an exponential growth of the number of symbolic terms of the transfer function with the circuit size. This study pr...
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| Format: | Article |
| Language: | English |
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MDPI AG
2023-03-01
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| Series: | Mathematics |
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| Online Access: | https://www.mdpi.com/2227-7390/11/6/1498 |
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| author | Navid Behmanesh-Fard Hossein Yazdanjouei Mohammad Shokouhifar Frank Werner |
| author_facet | Navid Behmanesh-Fard Hossein Yazdanjouei Mohammad Shokouhifar Frank Werner |
| author_sort | Navid Behmanesh-Fard |
| collection | DOAJ |
| description | Symbolic pole/zero analysis is a crucial step in designing an analog operational amplifier. Generally, a simplified symbolic analysis of analog circuits suffers from NP-hardness, i.e., an exponential growth of the number of symbolic terms of the transfer function with the circuit size. This study presents a mathematical model combined with a heuristic–metaheuristic solution method for symbolic pole/zero simplification in operational transconductance amplifiers. First, the circuit is symbolically solved and an improved root splitting method is applied to extract symbolic poles/zeroes from the exact expanded transfer function. Then, a hybrid algorithm based on heuristic information and a metaheuristic technique using simulated annealing is used for the simplification of the derived symbolic roots. The developed method is tested on three operational transconductance amplifiers. The obtained results show the effectiveness of the proposed method in achieving accurate simplified symbolic pole/zero expressions with the least complexity. |
| first_indexed | 2024-03-11T06:13:29Z |
| format | Article |
| id | doaj.art-8d414eacb6f64fa4bdc1ba3bb6e1863a |
| institution | Directory Open Access Journal |
| issn | 2227-7390 |
| language | English |
| last_indexed | 2024-03-11T06:13:29Z |
| publishDate | 2023-03-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Mathematics |
| spelling | doaj.art-8d414eacb6f64fa4bdc1ba3bb6e1863a2023-11-17T12:29:29ZengMDPI AGMathematics2227-73902023-03-01116149810.3390/math11061498Mathematical Circuit Root Simplification Using an Ensemble Heuristic–Metaheuristic AlgorithmNavid Behmanesh-Fard0Hossein Yazdanjouei1Mohammad Shokouhifar2Frank Werner3Department of Electrical Engineering, Technical and Vocational University (TVU), Tehran 1435661137, IranMicroelectronics Research Laboratory, Urmia University, Urmia 5756151818, IranDepartment of Electrical and Computer Engineering, Shahid Beheshti University, Tehran 1983969411, IranFaculty of Mathematics, Otto-Von-Guericke-University, 39016 Magdeburg, GermanySymbolic pole/zero analysis is a crucial step in designing an analog operational amplifier. Generally, a simplified symbolic analysis of analog circuits suffers from NP-hardness, i.e., an exponential growth of the number of symbolic terms of the transfer function with the circuit size. This study presents a mathematical model combined with a heuristic–metaheuristic solution method for symbolic pole/zero simplification in operational transconductance amplifiers. First, the circuit is symbolically solved and an improved root splitting method is applied to extract symbolic poles/zeroes from the exact expanded transfer function. Then, a hybrid algorithm based on heuristic information and a metaheuristic technique using simulated annealing is used for the simplification of the derived symbolic roots. The developed method is tested on three operational transconductance amplifiers. The obtained results show the effectiveness of the proposed method in achieving accurate simplified symbolic pole/zero expressions with the least complexity.https://www.mdpi.com/2227-7390/11/6/1498operational transconductance amplifierssymbolic circuit analysispole/zero extractionroot splittingsimplificationsimulated annealing |
| spellingShingle | Navid Behmanesh-Fard Hossein Yazdanjouei Mohammad Shokouhifar Frank Werner Mathematical Circuit Root Simplification Using an Ensemble Heuristic–Metaheuristic Algorithm Mathematics operational transconductance amplifiers symbolic circuit analysis pole/zero extraction root splitting simplification simulated annealing |
| title | Mathematical Circuit Root Simplification Using an Ensemble Heuristic–Metaheuristic Algorithm |
| title_full | Mathematical Circuit Root Simplification Using an Ensemble Heuristic–Metaheuristic Algorithm |
| title_fullStr | Mathematical Circuit Root Simplification Using an Ensemble Heuristic–Metaheuristic Algorithm |
| title_full_unstemmed | Mathematical Circuit Root Simplification Using an Ensemble Heuristic–Metaheuristic Algorithm |
| title_short | Mathematical Circuit Root Simplification Using an Ensemble Heuristic–Metaheuristic Algorithm |
| title_sort | mathematical circuit root simplification using an ensemble heuristic metaheuristic algorithm |
| topic | operational transconductance amplifiers symbolic circuit analysis pole/zero extraction root splitting simplification simulated annealing |
| url | https://www.mdpi.com/2227-7390/11/6/1498 |
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