Effects of Channel Thickness on Electrical Performance and Stability of High-Performance InSnO Thin-Film Transistors

InSnO (ITO) thin-film transistors (TFTs) attract much attention in fields of displays and low-cost integrated circuits (IC). In the present work, we demonstrate the high-performance, robust ITO TFTs that fabricated at process temperature no higher than 100 °C. The influences of channel thickness (t&...

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Bibliographic Details
Main Authors: Qi Li, Junchen Dong, Dedong Han, Yi Wang
Format: Article
Language:English
Published: MDPI AG 2021-11-01
Series:Membranes
Subjects:
Online Access:https://www.mdpi.com/2077-0375/11/12/929
Description
Summary:InSnO (ITO) thin-film transistors (TFTs) attract much attention in fields of displays and low-cost integrated circuits (IC). In the present work, we demonstrate the high-performance, robust ITO TFTs that fabricated at process temperature no higher than 100 °C. The influences of channel thickness (t<sub>ITO</sub>, respectively, 6, 9, 12, and 15 nm) on device performance and positive bias stress (PBS) stability of the ITO TFTs are examined. We found that content of oxygen defects positively correlates with t<sub>ITO</sub>, leading to increases of both trap states as well as carrier concentration and synthetically determining electrical properties of the ITO TFTs. Interestingly, the ITO TFTs with a t<sub>ITO</sub> of 9 nm exhibit the best performance and PBS stability, and typical electrical properties include a field-effect mobility (µ<sub>FE</sub>) of 37.69 cm<sup>2</sup>/Vs, a V<sub>on</sub> of −2.3 V, a SS of 167.49 mV/decade, and an on–off current ratio over 10<sup>7</sup>. This work paves the way for practical application of the ITO TFTs.
ISSN:2077-0375