Implementing a Chaotic Cryptosystem by Performing Parallel Computing on Embedded Systems with Multiprocessors
Profiling and parallel computing techniques in a cluster of six embedded systems with multiprocessors are introduced herein to implement a chaotic cryptosystem for digital color images. The proposed encryption method is based on stream encryption using a pseudo-random number generator with high-prec...
| Main Authors: | , , , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2019-03-01
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| Series: | Entropy |
| Subjects: | |
| Online Access: | http://www.mdpi.com/1099-4300/21/3/268 |
| _version_ | 1817995436313542656 |
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| author | Abraham Flores-Vergara Everardo Inzunza-González Enrique Efren García-Guerrero Oscar Roberto López-Bonilla Eduardo Rodríguez-Orozco Juan Miguel Hernández-Ontiveros José Ricardo Cárdenas-Valdez Esteban Tlelo-Cuautle |
| author_facet | Abraham Flores-Vergara Everardo Inzunza-González Enrique Efren García-Guerrero Oscar Roberto López-Bonilla Eduardo Rodríguez-Orozco Juan Miguel Hernández-Ontiveros José Ricardo Cárdenas-Valdez Esteban Tlelo-Cuautle |
| author_sort | Abraham Flores-Vergara |
| collection | DOAJ |
| description | Profiling and parallel computing techniques in a cluster of six embedded systems with multiprocessors are introduced herein to implement a chaotic cryptosystem for digital color images. The proposed encryption method is based on stream encryption using a pseudo-random number generator with high-precision arithmetic and data processing in parallel with collective communication. The profiling and parallel computing techniques allow discovery of the optimal number of processors that are necessary to improve the efficiency of the cryptosystem. That is, the processing speed improves the time for generating chaotic sequences and execution of the encryption algorithm. In addition, the high numerical precision reduces the digital degradation in a chaotic system and increases the security levels of the cryptosystem. The security analysis confirms that the proposed cryptosystem is secure and robust against different attacks that have been widely reported in the literature. Accordingly, we highlight that the proposed encryption method is potentially feasible to be implemented in practical applications, such as modern telecommunication devices employing multiprocessors, e.g., smart phones, tablets, and in any embedded system with multi-core hardware. |
| first_indexed | 2024-04-14T02:05:54Z |
| format | Article |
| id | doaj.art-92c81048fff7494080bbd309abc9690e |
| institution | Directory Open Access Journal |
| issn | 1099-4300 |
| language | English |
| last_indexed | 2024-04-14T02:05:54Z |
| publishDate | 2019-03-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Entropy |
| spelling | doaj.art-92c81048fff7494080bbd309abc9690e2022-12-22T02:18:40ZengMDPI AGEntropy1099-43002019-03-0121326810.3390/e21030268e21030268Implementing a Chaotic Cryptosystem by Performing Parallel Computing on Embedded Systems with MultiprocessorsAbraham Flores-Vergara0Everardo Inzunza-González1Enrique Efren García-Guerrero2Oscar Roberto López-Bonilla3Eduardo Rodríguez-Orozco4Juan Miguel Hernández-Ontiveros5José Ricardo Cárdenas-Valdez6Esteban Tlelo-Cuautle7UABC, Engineering, Architecture and Design Faculty, 22860 Ensenada, MexicoUABC, Engineering, Architecture and Design Faculty, 22860 Ensenada, MexicoUABC, Engineering, Architecture and Design Faculty, 22860 Ensenada, MexicoUABC, Engineering, Architecture and Design Faculty, 22860 Ensenada, MexicoITE, Department of Electrical and Electronic Engineering, Ensenada Institute of Technology, 22780 Ensenada, MexicoCBTIS, Industrial Technological and Services Baccalaureate Center, Mazatlan, MexicoITT, Department of Electrical and Electronic Engineering, Tijuana Institute of Technology, 22435 Tijuana, MexicoINAOE, Department of Electronics, 72840 Puebla, MexicoProfiling and parallel computing techniques in a cluster of six embedded systems with multiprocessors are introduced herein to implement a chaotic cryptosystem for digital color images. The proposed encryption method is based on stream encryption using a pseudo-random number generator with high-precision arithmetic and data processing in parallel with collective communication. The profiling and parallel computing techniques allow discovery of the optimal number of processors that are necessary to improve the efficiency of the cryptosystem. That is, the processing speed improves the time for generating chaotic sequences and execution of the encryption algorithm. In addition, the high numerical precision reduces the digital degradation in a chaotic system and increases the security levels of the cryptosystem. The security analysis confirms that the proposed cryptosystem is secure and robust against different attacks that have been widely reported in the literature. Accordingly, we highlight that the proposed encryption method is potentially feasible to be implemented in practical applications, such as modern telecommunication devices employing multiprocessors, e.g., smart phones, tablets, and in any embedded system with multi-core hardware.http://www.mdpi.com/1099-4300/21/3/268cryptosystemchaotic cryptographyembedded systemparallel computingPRNG |
| spellingShingle | Abraham Flores-Vergara Everardo Inzunza-González Enrique Efren García-Guerrero Oscar Roberto López-Bonilla Eduardo Rodríguez-Orozco Juan Miguel Hernández-Ontiveros José Ricardo Cárdenas-Valdez Esteban Tlelo-Cuautle Implementing a Chaotic Cryptosystem by Performing Parallel Computing on Embedded Systems with Multiprocessors Entropy cryptosystem chaotic cryptography embedded system parallel computing PRNG |
| title | Implementing a Chaotic Cryptosystem by Performing Parallel Computing on Embedded Systems with Multiprocessors |
| title_full | Implementing a Chaotic Cryptosystem by Performing Parallel Computing on Embedded Systems with Multiprocessors |
| title_fullStr | Implementing a Chaotic Cryptosystem by Performing Parallel Computing on Embedded Systems with Multiprocessors |
| title_full_unstemmed | Implementing a Chaotic Cryptosystem by Performing Parallel Computing on Embedded Systems with Multiprocessors |
| title_short | Implementing a Chaotic Cryptosystem by Performing Parallel Computing on Embedded Systems with Multiprocessors |
| title_sort | implementing a chaotic cryptosystem by performing parallel computing on embedded systems with multiprocessors |
| topic | cryptosystem chaotic cryptography embedded system parallel computing PRNG |
| url | http://www.mdpi.com/1099-4300/21/3/268 |
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