FPGA Implementation of Multilayer Perceptron for Speech Recognition
In this paper, a method for designing and implementing Multilayer Perceptron (MLP) based on the BP algorithm has been suggested. The method has described an MLP on Register Transfer Level (RTL) using VHDL description language and implemented on Field Programmable Gate Array (FPGA) for speech reco...
Main Author: | Ghassan Hazin Shakoory |
---|---|
Format: | Article |
Language: | Arabic |
Published: |
Mustansiriyah University/College of Engineering
2013-12-01
|
Series: | Journal of Engineering and Sustainable Development |
Subjects: | |
Online Access: | https://jeasd.uomustansiriyah.edu.iq/index.php/jeasd/article/view/1039 |
Similar Items
-
FPGA-Based Implementation of a Multilayer Perceptron Suitable for Chaotic Time Series Prediction
by: Ana Dalia Pano-Azucena, et al.
Published: (2018-10-01) -
Image Smoothing Based On FPGA
by: Maha A.R. Hasso, et al.
Published: (2013-08-01) -
Multilayer perceptron for face recognition
by: Ričardas Toliušis, et al.
Published: (2017-12-01) -
Implementation of Simplified Data Encryption Standard on FPGA using VHDL
by: salim Qadir Mohammed
Published: (2022-03-01) -
Hybrid hidden markov model and multilayer perceptron for speech recognition /
by: 234469 Lim, Ying Sean
Published: (2005)