| Summary: | A low-noise fast-transient-response second-order delta-sigma-modulation buck converter with hysteresis-voltage-controlled techniques is proposed. With the proposed control approach, the transient time can be accelerated by roughly 60%. The rail-to-rail OTA generates a current I<sub>Sense</sub>, which replicates the inductor current I<sub>L</sub> with K times. As ISense flows through the capacitor C<sub>Sense</sub>, it will be converted into VSense. Then, the hysteresis-voltage-controlled (HVC) circuit compares the two terminal voltages of hysteresis comparator to detect the overshoot and undershoot of V<sub>Sense</sub>. Once V<sub>Sense</sub> is detected, the output signal of HVC circuits becomes opposite to the previous state to conduct M<sub>P</sub> and M<sub>N</sub> previously. Besides, the 2<sup>nd</sup>-order delta-sigma-modulation (DSM) circuit plays a vital role of mitigating noise-interference and elevating noise in whole circuits. The proposed converter has been fabricated in TSMC <inline-formula> <tex-math notation="LaTeX">$0.18~\mu \text{m}$ </tex-math></inline-formula> 1P6M CMOS processes with an active area of <inline-formula> <tex-math notation="LaTeX">$1.19\times 1.09$ </tex-math></inline-formula>mm<sup>2</sup>. The measured results show the transient time are <inline-formula> <tex-math notation="LaTeX">$3.5~\mu \text{s}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$3.2~\mu \text{s}$ </tex-math></inline-formula>, respectively, when the load current changes between 500mA and 100mA. On the basic of the measured results of fast-fourier-transform (FFT), the value of output-to-noise ratio (ONR) is 76.6dB at the sampling frequency of 10MHz. The peak conversion efficiency is 92.1% while the load current is 300mA.
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