GAN-Based Framework for Unified Estimation of Process-Induced Random Variation in FinFET

For higher density of transistors in Integrated Circuit (IC), various scaling technologies have been introduced. In the light of the physical limit in advancing single-gate transistor architecture, the structural transition from planar device architecture toward 3D device architecture (of which the...

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Hlavní autoři: Taeeon Park, Jihwan Kwak, Hongjoon Ahn, Jinwoong Lee, Jaehyuk Lim, Sangho Yu, Changhwan Shin, Taesup Moon
Médium: Článek
Jazyk:English
Vydáno: IEEE 2022-01-01
Edice:IEEE Access
Témata:
On-line přístup:https://ieeexplore.ieee.org/document/9982433/