An Asynchronous IEEE Floating-Point Arithmetic Unit
An asynchronous floating-point arithmetic unit is designed and tested at the transistor level usingCadence software. It uses CMOS (complementary metal oxide semiconductor) and DCVS (differentialcascode voltage switch) logic in a 0.35 µm process using a 3.3 V supply voltage, with dual-rail data ands...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
University of the Philippines
2007-12-01
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| Series: | Science Diliman |
| Subjects: | |
| Online Access: | http://journals.upd.edu.ph/index.php/sciencediliman/article/view/711 |