Hardware-Optimized Architecture of On-Board Registration for Remote-Sensing Images —Take SURF as an Example

Hardware-Optimized Architecture of On-Board Registration for Remote-Sensing Images —Take SURF as an Example

On-board processing has become an inevitable choice for the development of remote-sensing satellites. For the satellites with dual-line array asynchronous push-broom mode, image registration is crucial for pixel localization and alignment between dual-band strip data. However, due to the high comput...

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Bibliographic Details
Main Authors:	Xin Du, Cankun Yang, Ruofei Zhong, Qingyang Li, Yuanhang Wang, Zhaoming Huang, Xianlin Liu
Format:	Article
Language:	English
Published:	IEEE 2024-01-01
Series:	IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing
Subjects:	Field programmable gate array (FPGA) hardware acceleration high-level synthesis (HLS) on-board processing speed-up robust features (SURF)
Online Access:	https://ieeexplore.ieee.org/document/10473056/

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