Fast Design Space Exploration and Multi-Objective Optimization of Wide-Band Noise-Canceling LNAs
Design optimization of RF low-noise amplifiers (LNAs) remains a time-consuming and complex process. Iterations are needed to adjust impedance matching, gain, and noise figure (NF) simultaneously. The process can involve more iterations to adjust the non-linear behavior of the circuit which can be re...
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| Format: | Article |
| Language: | English |
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MDPI AG
2022-03-01
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| Series: | Electronics |
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| Online Access: | https://www.mdpi.com/2079-9292/11/5/816 |
| _version_ | 1797475286577577984 |
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| author | Karim Elmeligy Hesham Omran |
| author_facet | Karim Elmeligy Hesham Omran |
| author_sort | Karim Elmeligy |
| collection | DOAJ |
| description | Design optimization of RF low-noise amplifiers (LNAs) remains a time-consuming and complex process. Iterations are needed to adjust impedance matching, gain, and noise figure (NF) simultaneously. The process can involve more iterations to adjust the non-linear behavior of the circuit which can be represented by the input-referred third-order intercept (IIP3). In this work, we present a variation-aware automated design and optimization flow for a wide-band noise-canceling LNA. We include the circuit non-linearity in the optimization flow without using a simulator in the loop. By describing the transistors using precomputed lookup tables (LUTs), a design database that contains 200,000 design points is generated in 3 s only without non-linearity computation and 10 s when non-linearity is taken into account. Using a gm/ID-based correct-by-construction design procedure, the generated design points automatically satisfy proper biasing, input matching, and gain matching requirements. The generated database enables the designer to visualize the design space and explore the design trade-offs. Moreover, multi-objective optimization across corners for a given set of specifications is applied to find the Pareto-optimal fronts of the design figures-of-merit. We demonstrate the presented flow using two design examples in a 65 nm process and the results are verified using Cadence Spectre. |
| first_indexed | 2024-03-09T20:42:56Z |
| format | Article |
| id | doaj.art-99959836944743f6bab1d931f163998d |
| institution | Directory Open Access Journal |
| issn | 2079-9292 |
| language | English |
| last_indexed | 2024-03-09T20:42:56Z |
| publishDate | 2022-03-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Electronics |
| spelling | doaj.art-99959836944743f6bab1d931f163998d2023-11-23T22:54:22ZengMDPI AGElectronics2079-92922022-03-0111581610.3390/electronics11050816Fast Design Space Exploration and Multi-Objective Optimization of Wide-Band Noise-Canceling LNAsKarim Elmeligy0Hesham Omran1Electronics and Communications Engineering Department, Faculty of Engineering, Ain Shams University, Cairo 11517, EgyptElectronics and Communications Engineering Department, Faculty of Engineering, Ain Shams University, Cairo 11517, EgyptDesign optimization of RF low-noise amplifiers (LNAs) remains a time-consuming and complex process. Iterations are needed to adjust impedance matching, gain, and noise figure (NF) simultaneously. The process can involve more iterations to adjust the non-linear behavior of the circuit which can be represented by the input-referred third-order intercept (IIP3). In this work, we present a variation-aware automated design and optimization flow for a wide-band noise-canceling LNA. We include the circuit non-linearity in the optimization flow without using a simulator in the loop. By describing the transistors using precomputed lookup tables (LUTs), a design database that contains 200,000 design points is generated in 3 s only without non-linearity computation and 10 s when non-linearity is taken into account. Using a gm/ID-based correct-by-construction design procedure, the generated design points automatically satisfy proper biasing, input matching, and gain matching requirements. The generated database enables the designer to visualize the design space and explore the design trade-offs. Moreover, multi-objective optimization across corners for a given set of specifications is applied to find the Pareto-optimal fronts of the design figures-of-merit. We demonstrate the presented flow using two design examples in a 65 nm process and the results are verified using Cadence Spectre.https://www.mdpi.com/2079-9292/11/5/816low-noise amplifier (LNA)noise-canceling LNAanalog design automationgm/ID methodology |
| spellingShingle | Karim Elmeligy Hesham Omran Fast Design Space Exploration and Multi-Objective Optimization of Wide-Band Noise-Canceling LNAs Electronics low-noise amplifier (LNA) noise-canceling LNA analog design automation gm/ID methodology |
| title | Fast Design Space Exploration and Multi-Objective Optimization of Wide-Band Noise-Canceling LNAs |
| title_full | Fast Design Space Exploration and Multi-Objective Optimization of Wide-Band Noise-Canceling LNAs |
| title_fullStr | Fast Design Space Exploration and Multi-Objective Optimization of Wide-Band Noise-Canceling LNAs |
| title_full_unstemmed | Fast Design Space Exploration and Multi-Objective Optimization of Wide-Band Noise-Canceling LNAs |
| title_short | Fast Design Space Exploration and Multi-Objective Optimization of Wide-Band Noise-Canceling LNAs |
| title_sort | fast design space exploration and multi objective optimization of wide band noise canceling lnas |
| topic | low-noise amplifier (LNA) noise-canceling LNA analog design automation gm/ID methodology |
| url | https://www.mdpi.com/2079-9292/11/5/816 |
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