Summary: | This paper presents a wideband approach for L5 and S-band integer-N phase-locked loop (PLL) targeting Indian Regional Navigation Satellite System (IRNSS) applications. A reference spur reduction technique using a <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi>G</mi><mi>m</mi></msub><mo>−</mo><mi>C</mi></mrow></semantics></math></inline-formula> filter is proposed. The reference spur is improved by 7 dB when compared with one without any <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi>G</mi><mi>m</mi></msub><mo>−</mo><mi>C</mi></mrow></semantics></math></inline-formula> filter. The wideband integer-N PLL is designed and fabricated in UMC 65-nm CMOS process. The <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi>G</mi><mi>m</mi></msub><mo>−</mo><mi>C</mi></mrow></semantics></math></inline-formula> filter block consumes 200 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="sans-serif">μ</mi></semantics></math></inline-formula>A current. The wideband voltage-controlled oscillator (VCO) oscillates from <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mn>1.6</mn></mrow></semantics></math></inline-formula> GHz to <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mn>3.2</mn></mrow></semantics></math></inline-formula> GHz having a tuning range (TR) of <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mn>40</mn><mo>%</mo></mrow></semantics></math></inline-formula>, achieving a best and worst phase noise of ≈−122 dBc/Hz and ≈<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mo>−</mo><mn>116</mn></mrow></semantics></math></inline-formula> dBc/Hz at a 1 MHz offset, respectively.
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