A Gated Oscillator Clock and Data Recovery Circuit for Nanowatt Wake-Up and Data Receivers
This article presents a data-startable baseband logic featuring a gated oscillator clock and data recovery (GO-CDR) circuit for nanowatt wake-up and data receivers (WuRxs). At each data transition, the phase misalignment between the data coming from the analog front-end (AFE) and the clock is cleare...
| Main Authors: | , , , , , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2021-03-01
|
| Series: | Electronics |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2079-9292/10/7/780 |
| _version_ | 1797540039764213760 |
|---|---|
| author | Matteo D’Addato Alessia M. Elgani Luca Perilli Eleonora Franchi Scarselli Antonio Gnudi Roberto Canegallo Giulio Ricotti |
| author_facet | Matteo D’Addato Alessia M. Elgani Luca Perilli Eleonora Franchi Scarselli Antonio Gnudi Roberto Canegallo Giulio Ricotti |
| author_sort | Matteo D’Addato |
| collection | DOAJ |
| description | This article presents a data-startable baseband logic featuring a gated oscillator clock and data recovery (GO-CDR) circuit for nanowatt wake-up and data receivers (WuRxs). At each data transition, the phase misalignment between the data coming from the analog front-end (AFE) and the clock is cleared by the GO-CDR circuit, thus allowing the reception of long data streams. Any free-running frequency mismatch between the GO and the bitrate does not limit the number of receivable bits, but only the maximum number of equal consecutive bits (<i>N<sub>m</sub></i>). To overcome this limitation, the proposed system includes a frequency calibration circuit, which reduces the frequency mismatch to ±0.5%, thus enabling the WuRx to be used with different encoding techniques up to <i>N<sub>m</sub></i> = 100. A full WuRx prototype, including an always-on clockless AFE operating in subthreshold, was fabricated with STMicroelectronics 90 nm BCD technology. The WuRx is supplied with 0.6 V, and the power consumption, excluding the calibration circuit, is 12.8 nW during the rest state and 17 nW at a 1 kbps data rate. With a 1 kbps On-Off Keying (OOK) modulated input and −35 dBm of input RF power after the input matching network (IMN), a 10<sup>−3</sup> missed detection rate with a 0 bit error tolerance is measured, transmitting 63 bit packets with the <i>N<sub>m</sub></i> ranging from 1 to 63. The total sensitivity, including the estimated IMN gain at 100 MHz and 433 MHz, is −59.8 dBm and −52.3 dBm, respectively. In comparison with an ideal CDR, the degradation of the sensitivity due to the GO-CDR is 1.25 dBm. False alarm rate measurements lasting 24 h revealed zero overall false wake-ups. |
| first_indexed | 2024-03-10T12:54:24Z |
| format | Article |
| id | doaj.art-9e71ea9b2f244906a360dd4599e1b888 |
| institution | Directory Open Access Journal |
| issn | 2079-9292 |
| language | English |
| last_indexed | 2024-03-10T12:54:24Z |
| publishDate | 2021-03-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Electronics |
| spelling | doaj.art-9e71ea9b2f244906a360dd4599e1b8882023-11-21T12:02:01ZengMDPI AGElectronics2079-92922021-03-0110778010.3390/electronics10070780A Gated Oscillator Clock and Data Recovery Circuit for Nanowatt Wake-Up and Data ReceiversMatteo D’Addato0Alessia M. Elgani1Luca Perilli2Eleonora Franchi Scarselli3Antonio Gnudi4Roberto Canegallo5Giulio Ricotti6Electrical, Electronic and Information Engineering Department “Guglielmo Marconi”, University of Bologna, Viale Risorgimento 2, 40123 Bologna, ItalyElectrical, Electronic and Information Engineering Department “Guglielmo Marconi”, University of Bologna, Viale Risorgimento 2, 40123 Bologna, ItalyAdvanced Research Center on Electronic Systems “Ercole De Castro”, University of Bologna, 40123 Bologna, ItalyElectrical, Electronic and Information Engineering Department “Guglielmo Marconi”, University of Bologna, Viale Risorgimento 2, 40123 Bologna, ItalyElectrical, Electronic and Information Engineering Department “Guglielmo Marconi”, University of Bologna, Viale Risorgimento 2, 40123 Bologna, ItalySTMicroelectronics, 20864 Agrate Brianza e Cornaredo, ItalySTMicroelectronics, 20864 Agrate Brianza e Cornaredo, ItalyThis article presents a data-startable baseband logic featuring a gated oscillator clock and data recovery (GO-CDR) circuit for nanowatt wake-up and data receivers (WuRxs). At each data transition, the phase misalignment between the data coming from the analog front-end (AFE) and the clock is cleared by the GO-CDR circuit, thus allowing the reception of long data streams. Any free-running frequency mismatch between the GO and the bitrate does not limit the number of receivable bits, but only the maximum number of equal consecutive bits (<i>N<sub>m</sub></i>). To overcome this limitation, the proposed system includes a frequency calibration circuit, which reduces the frequency mismatch to ±0.5%, thus enabling the WuRx to be used with different encoding techniques up to <i>N<sub>m</sub></i> = 100. A full WuRx prototype, including an always-on clockless AFE operating in subthreshold, was fabricated with STMicroelectronics 90 nm BCD technology. The WuRx is supplied with 0.6 V, and the power consumption, excluding the calibration circuit, is 12.8 nW during the rest state and 17 nW at a 1 kbps data rate. With a 1 kbps On-Off Keying (OOK) modulated input and −35 dBm of input RF power after the input matching network (IMN), a 10<sup>−3</sup> missed detection rate with a 0 bit error tolerance is measured, transmitting 63 bit packets with the <i>N<sub>m</sub></i> ranging from 1 to 63. The total sensitivity, including the estimated IMN gain at 100 MHz and 433 MHz, is −59.8 dBm and −52.3 dBm, respectively. In comparison with an ideal CDR, the degradation of the sensitivity due to the GO-CDR is 1.25 dBm. False alarm rate measurements lasting 24 h revealed zero overall false wake-ups.https://www.mdpi.com/2079-9292/10/7/780clock and data recovery (CDR)Internet of things (IoT)nanowatt data receiverultra-low-powerwake-up receiver (WuRx) |
| spellingShingle | Matteo D’Addato Alessia M. Elgani Luca Perilli Eleonora Franchi Scarselli Antonio Gnudi Roberto Canegallo Giulio Ricotti A Gated Oscillator Clock and Data Recovery Circuit for Nanowatt Wake-Up and Data Receivers Electronics clock and data recovery (CDR) Internet of things (IoT) nanowatt data receiver ultra-low-power wake-up receiver (WuRx) |
| title | A Gated Oscillator Clock and Data Recovery Circuit for Nanowatt Wake-Up and Data Receivers |
| title_full | A Gated Oscillator Clock and Data Recovery Circuit for Nanowatt Wake-Up and Data Receivers |
| title_fullStr | A Gated Oscillator Clock and Data Recovery Circuit for Nanowatt Wake-Up and Data Receivers |
| title_full_unstemmed | A Gated Oscillator Clock and Data Recovery Circuit for Nanowatt Wake-Up and Data Receivers |
| title_short | A Gated Oscillator Clock and Data Recovery Circuit for Nanowatt Wake-Up and Data Receivers |
| title_sort | gated oscillator clock and data recovery circuit for nanowatt wake up and data receivers |
| topic | clock and data recovery (CDR) Internet of things (IoT) nanowatt data receiver ultra-low-power wake-up receiver (WuRx) |
| url | https://www.mdpi.com/2079-9292/10/7/780 |
| work_keys_str_mv | AT matteodaddato agatedoscillatorclockanddatarecoverycircuitfornanowattwakeupanddatareceivers AT alessiamelgani agatedoscillatorclockanddatarecoverycircuitfornanowattwakeupanddatareceivers AT lucaperilli agatedoscillatorclockanddatarecoverycircuitfornanowattwakeupanddatareceivers AT eleonorafranchiscarselli agatedoscillatorclockanddatarecoverycircuitfornanowattwakeupanddatareceivers AT antoniognudi agatedoscillatorclockanddatarecoverycircuitfornanowattwakeupanddatareceivers AT robertocanegallo agatedoscillatorclockanddatarecoverycircuitfornanowattwakeupanddatareceivers AT giulioricotti agatedoscillatorclockanddatarecoverycircuitfornanowattwakeupanddatareceivers AT matteodaddato gatedoscillatorclockanddatarecoverycircuitfornanowattwakeupanddatareceivers AT alessiamelgani gatedoscillatorclockanddatarecoverycircuitfornanowattwakeupanddatareceivers AT lucaperilli gatedoscillatorclockanddatarecoverycircuitfornanowattwakeupanddatareceivers AT eleonorafranchiscarselli gatedoscillatorclockanddatarecoverycircuitfornanowattwakeupanddatareceivers AT antoniognudi gatedoscillatorclockanddatarecoverycircuitfornanowattwakeupanddatareceivers AT robertocanegallo gatedoscillatorclockanddatarecoverycircuitfornanowattwakeupanddatareceivers AT giulioricotti gatedoscillatorclockanddatarecoverycircuitfornanowattwakeupanddatareceivers |