An Automated Design Methodology for Ring Voltage-Controlled Oscillators in Nanometer CMOS Technologies
This paper presents a design automation methodology for ring voltage-controlled oscillators (RVCOs) with their realistic and physical characteristics captured. With multiple sets of input constraints such as target frequency, phase noise, and control voltage range, the proposed algorithm automatical...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
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IEEE
2023-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10002363/ |
| _version_ | 1797902238526472192 |
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| author | Dongjun Lee Gijin Park Jaeduk Han Min-Seong Choo |
| author_facet | Dongjun Lee Gijin Park Jaeduk Han Min-Seong Choo |
| author_sort | Dongjun Lee |
| collection | DOAJ |
| description | This paper presents a design automation methodology for ring voltage-controlled oscillators (RVCOs) with their realistic and physical characteristics captured. With multiple sets of input constraints such as target frequency, phase noise, and control voltage range, the proposed algorithm automatically finds the design candidates that satisfy the target constraints, by running iterative post-layout simulations with auto-generated layouts and testbenches. The number of post-layout simulations is significantly reduced by the backtracking algorithm that observes the simulation results and determines the search direction. The proposed algorithm is applied to generate RVCOs in 40-nm planar and 7-nm FinFET technologies for DDR5 applications, and it turns out the proposed methodology produces sets of design parameters that meet the target specification in multiple technologies. |
| first_indexed | 2024-04-10T09:14:33Z |
| format | Article |
| id | doaj.art-9e9d3d6ff9f44c8598d48405ef7b3131 |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-04-10T09:14:33Z |
| publishDate | 2023-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-9e9d3d6ff9f44c8598d48405ef7b31312023-02-21T00:01:10ZengIEEEIEEE Access2169-35362023-01-01117530753910.1109/ACCESS.2022.323296010002363An Automated Design Methodology for Ring Voltage-Controlled Oscillators in Nanometer CMOS TechnologiesDongjun Lee0https://orcid.org/0000-0001-6023-4368Gijin Park1https://orcid.org/0000-0001-7837-2865Jaeduk Han2https://orcid.org/0000-0002-2292-7670Min-Seong Choo3https://orcid.org/0000-0002-8638-6332Department of Electronic Engineering, Hanyang University, Seoul, South KoreaAnalog and Mixed-Signal Center, Texas A&M University, College Station, TX, USADepartment of Electronic Engineering, Hanyang University, Seoul, South KoreaSchool of Electrical Engineering, Hanyang University, Ansan, South KoreaThis paper presents a design automation methodology for ring voltage-controlled oscillators (RVCOs) with their realistic and physical characteristics captured. With multiple sets of input constraints such as target frequency, phase noise, and control voltage range, the proposed algorithm automatically finds the design candidates that satisfy the target constraints, by running iterative post-layout simulations with auto-generated layouts and testbenches. The number of post-layout simulations is significantly reduced by the backtracking algorithm that observes the simulation results and determines the search direction. The proposed algorithm is applied to generate RVCOs in 40-nm planar and 7-nm FinFET technologies for DDR5 applications, and it turns out the proposed methodology produces sets of design parameters that meet the target specification in multiple technologies.https://ieeexplore.ieee.org/document/10002363/Ring oscillatorsdesign automationlayout generationCMOSFinFETfrequency control |
| spellingShingle | Dongjun Lee Gijin Park Jaeduk Han Min-Seong Choo An Automated Design Methodology for Ring Voltage-Controlled Oscillators in Nanometer CMOS Technologies IEEE Access Ring oscillators design automation layout generation CMOS FinFET frequency control |
| title | An Automated Design Methodology for Ring Voltage-Controlled Oscillators in Nanometer CMOS Technologies |
| title_full | An Automated Design Methodology for Ring Voltage-Controlled Oscillators in Nanometer CMOS Technologies |
| title_fullStr | An Automated Design Methodology for Ring Voltage-Controlled Oscillators in Nanometer CMOS Technologies |
| title_full_unstemmed | An Automated Design Methodology for Ring Voltage-Controlled Oscillators in Nanometer CMOS Technologies |
| title_short | An Automated Design Methodology for Ring Voltage-Controlled Oscillators in Nanometer CMOS Technologies |
| title_sort | automated design methodology for ring voltage controlled oscillators in nanometer cmos technologies |
| topic | Ring oscillators design automation layout generation CMOS FinFET frequency control |
| url | https://ieeexplore.ieee.org/document/10002363/ |
| work_keys_str_mv | AT dongjunlee anautomateddesignmethodologyforringvoltagecontrolledoscillatorsinnanometercmostechnologies AT gijinpark anautomateddesignmethodologyforringvoltagecontrolledoscillatorsinnanometercmostechnologies AT jaedukhan anautomateddesignmethodologyforringvoltagecontrolledoscillatorsinnanometercmostechnologies AT minseongchoo anautomateddesignmethodologyforringvoltagecontrolledoscillatorsinnanometercmostechnologies AT dongjunlee automateddesignmethodologyforringvoltagecontrolledoscillatorsinnanometercmostechnologies AT gijinpark automateddesignmethodologyforringvoltagecontrolledoscillatorsinnanometercmostechnologies AT jaedukhan automateddesignmethodologyforringvoltagecontrolledoscillatorsinnanometercmostechnologies AT minseongchoo automateddesignmethodologyforringvoltagecontrolledoscillatorsinnanometercmostechnologies |