High-Performance and Area-Efficient Ferroelectric FET-Based Nonvolatile Flip-Flops
Recently, nonvolatile systems with nonvolatile flip-flops (NVFFs) have gained prominence for their energy efficiency in energy-harvesting devices and battery-operated Internet of Things applications. They are normally-off instantly-on, and thus, can save energy effectively owing to their zero standb...
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IEEE
2021-01-01
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Series: | IEEE Access |
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Online Access: | https://ieeexplore.ieee.org/document/9361560/ |
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author | Sekeon Kim Tae Woo Oh Sehee Lim Dong Han Ko Seong-Ook Jung |
author_facet | Sekeon Kim Tae Woo Oh Sehee Lim Dong Han Ko Seong-Ook Jung |
author_sort | Sekeon Kim |
collection | DOAJ |
description | Recently, nonvolatile systems with nonvolatile flip-flops (NVFFs) have gained prominence for their energy efficiency in energy-harvesting devices and battery-operated Internet of Things applications. They are normally-off instantly-on, and thus, can save energy effectively owing to their zero standby power consumption. An NVFF stores the computing state in nonvolatile memories (NVMs) when the power is off. A ferroelectric field-effect transistor (FeFET) is one of the most promising NVMs owing to its high <inline-formula> <tex-math notation="LaTeX">$\text{I}_{\mathrm {on}}/\text{I}_{\mathrm {off}}$ </tex-math></inline-formula> ratio and low write power. Three FeFET-based NVFFs (previous FeFET-out NVFF-1/-2 and FeFET-in NVFF) were recently proposed to improve the area, power, and speed; however, they still have their own problems. Previous FeFET-out NVFF-1 has large area overhead and previous FeFET-out NVFF-2 does not properly perform restore operation. Previous FeFET-in NVFF has a long clock-to-Q delay and high operating energy. This paper introduces two novel FeFET-based NVFFs (proposed FeFET-out and -in NVFFs). Proposed FeFET-out NVFF reduces the large area overhead of previous FeFET-out NVFF-1 and corrects the malfunction in the restore operation of previous FeFET-out NVFF-2. Proposed FeFET-in NVFF achieves a better clock-to-Q delay, operating energy, and area than the previous FeFET-in NVFF. Monte Carlo simulations based on an industry-compatible 10-nm FinFET model are performed for a comparative analysis. Proposed FeFET-out NVFF achieves 17.6% smaller area with slightly higher (6.3%) operating energy and only 0.8% slower clock-to-Q delay than previous FeFET-out NVFF-1. Proposed FeFET-in NVFF achieves 18.9% shorter clock-to-Q and 3.0% smaller operating energy with 8.7% smaller area than the previous FeFET-in NVFF. |
first_indexed | 2024-04-09T18:25:41Z |
format | Article |
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issn | 2169-3536 |
language | English |
last_indexed | 2024-04-09T18:25:41Z |
publishDate | 2021-01-01 |
publisher | IEEE |
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series | IEEE Access |
spelling | doaj.art-a009250ee05945c6b122a925e53b06982023-04-11T23:00:29ZengIEEEIEEE Access2169-35362021-01-019355493556110.1109/ACCESS.2021.30617219361560High-Performance and Area-Efficient Ferroelectric FET-Based Nonvolatile Flip-FlopsSekeon Kim0https://orcid.org/0000-0001-5927-9390Tae Woo Oh1https://orcid.org/0000-0002-7545-2429Sehee Lim2https://orcid.org/0000-0003-4772-2695Dong Han Ko3https://orcid.org/0000-0002-9028-4603Seong-Ook Jung4https://orcid.org/0000-0003-0757-2581School of Electrical and Electronic Engineering, Yonsei University, Seoul, South KoreaSchool of Electrical and Electronic Engineering, Yonsei University, Seoul, South KoreaSchool of Electrical and Electronic Engineering, Yonsei University, Seoul, South KoreaSchool of Electrical and Electronic Engineering, Yonsei University, Seoul, South KoreaSchool of Electrical and Electronic Engineering, Yonsei University, Seoul, South KoreaRecently, nonvolatile systems with nonvolatile flip-flops (NVFFs) have gained prominence for their energy efficiency in energy-harvesting devices and battery-operated Internet of Things applications. They are normally-off instantly-on, and thus, can save energy effectively owing to their zero standby power consumption. An NVFF stores the computing state in nonvolatile memories (NVMs) when the power is off. A ferroelectric field-effect transistor (FeFET) is one of the most promising NVMs owing to its high <inline-formula> <tex-math notation="LaTeX">$\text{I}_{\mathrm {on}}/\text{I}_{\mathrm {off}}$ </tex-math></inline-formula> ratio and low write power. Three FeFET-based NVFFs (previous FeFET-out NVFF-1/-2 and FeFET-in NVFF) were recently proposed to improve the area, power, and speed; however, they still have their own problems. Previous FeFET-out NVFF-1 has large area overhead and previous FeFET-out NVFF-2 does not properly perform restore operation. Previous FeFET-in NVFF has a long clock-to-Q delay and high operating energy. This paper introduces two novel FeFET-based NVFFs (proposed FeFET-out and -in NVFFs). Proposed FeFET-out NVFF reduces the large area overhead of previous FeFET-out NVFF-1 and corrects the malfunction in the restore operation of previous FeFET-out NVFF-2. Proposed FeFET-in NVFF achieves a better clock-to-Q delay, operating energy, and area than the previous FeFET-in NVFF. Monte Carlo simulations based on an industry-compatible 10-nm FinFET model are performed for a comparative analysis. Proposed FeFET-out NVFF achieves 17.6% smaller area with slightly higher (6.3%) operating energy and only 0.8% slower clock-to-Q delay than previous FeFET-out NVFF-1. Proposed FeFET-in NVFF achieves 18.9% shorter clock-to-Q and 3.0% smaller operating energy with 8.7% smaller area than the previous FeFET-in NVFF.https://ieeexplore.ieee.org/document/9361560/Energy harvestingferroelectric field-effect transistorhysteresisInternet of Thingsnonvolatile flip-floppower gating |
spellingShingle | Sekeon Kim Tae Woo Oh Sehee Lim Dong Han Ko Seong-Ook Jung High-Performance and Area-Efficient Ferroelectric FET-Based Nonvolatile Flip-Flops IEEE Access Energy harvesting ferroelectric field-effect transistor hysteresis Internet of Things nonvolatile flip-flop power gating |
title | High-Performance and Area-Efficient Ferroelectric FET-Based Nonvolatile Flip-Flops |
title_full | High-Performance and Area-Efficient Ferroelectric FET-Based Nonvolatile Flip-Flops |
title_fullStr | High-Performance and Area-Efficient Ferroelectric FET-Based Nonvolatile Flip-Flops |
title_full_unstemmed | High-Performance and Area-Efficient Ferroelectric FET-Based Nonvolatile Flip-Flops |
title_short | High-Performance and Area-Efficient Ferroelectric FET-Based Nonvolatile Flip-Flops |
title_sort | high performance and area efficient ferroelectric fet based nonvolatile flip flops |
topic | Energy harvesting ferroelectric field-effect transistor hysteresis Internet of Things nonvolatile flip-flop power gating |
url | https://ieeexplore.ieee.org/document/9361560/ |
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