Artificial Neural Network Modeling of a CMOS Differential Low-Noise Amplifier Using the Bayesian Regularization Algorithm
The purpose of this communication is to present the modeling of an Artificial Neural Network (ANN) for a differential Complementary Metal Oxide Semiconductor (CMOS) Low-Noise Amplifier (LNA) designed for wireless applications. For satellite transponder applications employing differential LNAs, vario...
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MDPI AG
2023-10-01
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| Online Access: | https://www.mdpi.com/1424-8220/23/21/8790 |
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| author | Bhuvaneshwari Subburaman Vignesh Thangaraj Vadivel Balu Uma Maheswari Pandyan Jayshri Kulkarni |
| author_facet | Bhuvaneshwari Subburaman Vignesh Thangaraj Vadivel Balu Uma Maheswari Pandyan Jayshri Kulkarni |
| author_sort | Bhuvaneshwari Subburaman |
| collection | DOAJ |
| description | The purpose of this communication is to present the modeling of an Artificial Neural Network (ANN) for a differential Complementary Metal Oxide Semiconductor (CMOS) Low-Noise Amplifier (LNA) designed for wireless applications. For satellite transponder applications employing differential LNAs, various techniques, such as gain boosting, linearity improvement, and body bias, have been individually documented in the literature. The proposed LNA combines all three of these techniques differentially, aiming to achieve a high gain, a low noise figure, excellent linearity, and reduced power consumption. Under simulation conditions at 5 GHz using Cadence, the proposed LNA demonstrates a high gain (S21) of 29.5 dB and a low noise figure (NF) of 1.2 dB, with a reduced supply voltage of only 0.9 V. Additionally, it exhibits a reflection coefficient (S11) of less than −10 dB, a power dissipation (Pdc) of 19.3 mW, and a third-order input intercept point (IIP3) of 0.2 dBm. The performance results of the proposed LNA, combining all three techniques, outperform those of LNAs employing only two of the above techniques. The proposed LNA is modeled using PatternNet BR, and the simulation results closely align with the results of the developed ANN. In comparison to the Cadence simulation method, the proposed approach also offers accurate circuit solutions. |
| first_indexed | 2024-03-11T11:21:35Z |
| format | Article |
| id | doaj.art-a03b7233b0a24ddaac66d7cf1c291bd9 |
| institution | Directory Open Access Journal |
| issn | 1424-8220 |
| language | English |
| last_indexed | 2024-03-11T11:21:35Z |
| publishDate | 2023-10-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Sensors |
| spelling | doaj.art-a03b7233b0a24ddaac66d7cf1c291bd92023-11-10T15:12:04ZengMDPI AGSensors1424-82202023-10-012321879010.3390/s23218790Artificial Neural Network Modeling of a CMOS Differential Low-Noise Amplifier Using the Bayesian Regularization AlgorithmBhuvaneshwari Subburaman0Vignesh Thangaraj1Vadivel Balu2Uma Maheswari Pandyan3Jayshri Kulkarni4ECE Department, Mangayarkarasi College of Engineering, Madurai 625402, Tamil Nadu, IndiaECE Department, Mangayarkarasi College of Engineering, Madurai 625402, Tamil Nadu, IndiaECE Department, Mangayarkarasi College of Engineering, Madurai 625402, Tamil Nadu, IndiaECE Department, Velammal College of Engineering and Technology, Madurai 625009, Tamil Nadu, IndiaDepartment of Electrical and Computer Engineering, Baylor University, Waco, TX 76798, USAThe purpose of this communication is to present the modeling of an Artificial Neural Network (ANN) for a differential Complementary Metal Oxide Semiconductor (CMOS) Low-Noise Amplifier (LNA) designed for wireless applications. For satellite transponder applications employing differential LNAs, various techniques, such as gain boosting, linearity improvement, and body bias, have been individually documented in the literature. The proposed LNA combines all three of these techniques differentially, aiming to achieve a high gain, a low noise figure, excellent linearity, and reduced power consumption. Under simulation conditions at 5 GHz using Cadence, the proposed LNA demonstrates a high gain (S21) of 29.5 dB and a low noise figure (NF) of 1.2 dB, with a reduced supply voltage of only 0.9 V. Additionally, it exhibits a reflection coefficient (S11) of less than −10 dB, a power dissipation (Pdc) of 19.3 mW, and a third-order input intercept point (IIP3) of 0.2 dBm. The performance results of the proposed LNA, combining all three techniques, outperform those of LNAs employing only two of the above techniques. The proposed LNA is modeled using PatternNet BR, and the simulation results closely align with the results of the developed ANN. In comparison to the Cadence simulation method, the proposed approach also offers accurate circuit solutions.https://www.mdpi.com/1424-8220/23/21/8790gain boostingdifferential cascodecapacitor cross-couplinglow-noise amplifierANNBayesian regularization |
| spellingShingle | Bhuvaneshwari Subburaman Vignesh Thangaraj Vadivel Balu Uma Maheswari Pandyan Jayshri Kulkarni Artificial Neural Network Modeling of a CMOS Differential Low-Noise Amplifier Using the Bayesian Regularization Algorithm Sensors gain boosting differential cascode capacitor cross-coupling low-noise amplifier ANN Bayesian regularization |
| title | Artificial Neural Network Modeling of a CMOS Differential Low-Noise Amplifier Using the Bayesian Regularization Algorithm |
| title_full | Artificial Neural Network Modeling of a CMOS Differential Low-Noise Amplifier Using the Bayesian Regularization Algorithm |
| title_fullStr | Artificial Neural Network Modeling of a CMOS Differential Low-Noise Amplifier Using the Bayesian Regularization Algorithm |
| title_full_unstemmed | Artificial Neural Network Modeling of a CMOS Differential Low-Noise Amplifier Using the Bayesian Regularization Algorithm |
| title_short | Artificial Neural Network Modeling of a CMOS Differential Low-Noise Amplifier Using the Bayesian Regularization Algorithm |
| title_sort | artificial neural network modeling of a cmos differential low noise amplifier using the bayesian regularization algorithm |
| topic | gain boosting differential cascode capacitor cross-coupling low-noise amplifier ANN Bayesian regularization |
| url | https://www.mdpi.com/1424-8220/23/21/8790 |
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