A Novel Vertical Si TFET With Dual Doping-Less Tunneling Junction: A Simulation Study Including Trap-Related Non-Idealities

In this article, we propose a novel vertical TFET that benefits from dual doping-less tunneling junction. Due to the low on-state current of silicon-based TFETs, we employ a dual-source configuration and a high-k dielectric material in the oxide region. The performance assessment of our device is th...

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Bibliographic Details
Main Authors: Iman Chahardah Cherik, Saeed Mohammadi
Format: Article
Language:English
Published: IEEE 2023-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/10210567/

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