DVFS and Its Architectural Simulation Models for Improving Energy Efficiency of Complex Embedded Systems in Early Design Phase
Dealing with resource constraints is an inevitable feature of embedded systems. Power and performance are the main concerns beside others. Pre-silicon analysis of power and performance in today’s complex embedded designs is a big challenge. Although RTL (Register-Transfer Level) models are...
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| Format: | Article |
| Language: | English |
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MDPI AG
2020-01-01
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| Series: | Computers |
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| Online Access: | https://www.mdpi.com/2073-431X/9/1/2 |
| _version_ | 1811298616755617792 |
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| author | Parham Haririan |
| author_facet | Parham Haririan |
| author_sort | Parham Haririan |
| collection | DOAJ |
| description | Dealing with resource constraints is an inevitable feature of embedded systems. Power and performance are the main concerns beside others. Pre-silicon analysis of power and performance in today’s complex embedded designs is a big challenge. Although RTL (Register-Transfer Level) models are more precise and reliable, system-level modeling enables the power and performance analysis of complex and dense designs in the early design phase. Virtual prototypes of systems prepared through architectural simulation provide a means of evaluating non-existing systems with more flexibility and minimum cost. Efficient interplay between power and performance is a key feature within virtual platforms. This article focuses on dynamic voltage and frequency scaling (DVFS), which is a well-known system-level low-power design technique together with its more efficient implementations modeled through architectural simulation. With advent of new computing paradigms and modern application domains with strict resource demands, DVFS and its efficient hardware-managed solutions get even more highlighted. This is mainly because they can react faster to resource demands and thus reduce induced overhead. To that end, they entail an effective collaboration between software and hardware. A case review in the end wraps up the discussed topics. |
| first_indexed | 2024-04-13T06:22:45Z |
| format | Article |
| id | doaj.art-a2396b3575de443d93b41f09679f9805 |
| institution | Directory Open Access Journal |
| issn | 2073-431X |
| language | English |
| last_indexed | 2024-04-13T06:22:45Z |
| publishDate | 2020-01-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Computers |
| spelling | doaj.art-a2396b3575de443d93b41f09679f98052022-12-22T02:58:35ZengMDPI AGComputers2073-431X2020-01-0191210.3390/computers9010002computers9010002DVFS and Its Architectural Simulation Models for Improving Energy Efficiency of Complex Embedded Systems in Early Design PhaseParham Haririan0Department of Electrical Engineering (FB1), University of Bremen, Otto-Hahn-Allee 1, 28359 Bremen, GermanyDealing with resource constraints is an inevitable feature of embedded systems. Power and performance are the main concerns beside others. Pre-silicon analysis of power and performance in today’s complex embedded designs is a big challenge. Although RTL (Register-Transfer Level) models are more precise and reliable, system-level modeling enables the power and performance analysis of complex and dense designs in the early design phase. Virtual prototypes of systems prepared through architectural simulation provide a means of evaluating non-existing systems with more flexibility and minimum cost. Efficient interplay between power and performance is a key feature within virtual platforms. This article focuses on dynamic voltage and frequency scaling (DVFS), which is a well-known system-level low-power design technique together with its more efficient implementations modeled through architectural simulation. With advent of new computing paradigms and modern application domains with strict resource demands, DVFS and its efficient hardware-managed solutions get even more highlighted. This is mainly because they can react faster to resource demands and thus reduce induced overhead. To that end, they entail an effective collaboration between software and hardware. A case review in the end wraps up the discussed topics.https://www.mdpi.com/2073-431X/9/1/2hardware-managedembedded systemsarchitectural simulationrun-time power managementdvfshardware-software co-design |
| spellingShingle | Parham Haririan DVFS and Its Architectural Simulation Models for Improving Energy Efficiency of Complex Embedded Systems in Early Design Phase Computers hardware-managed embedded systems architectural simulation run-time power management dvfs hardware-software co-design |
| title | DVFS and Its Architectural Simulation Models for Improving Energy Efficiency of Complex Embedded Systems in Early Design Phase |
| title_full | DVFS and Its Architectural Simulation Models for Improving Energy Efficiency of Complex Embedded Systems in Early Design Phase |
| title_fullStr | DVFS and Its Architectural Simulation Models for Improving Energy Efficiency of Complex Embedded Systems in Early Design Phase |
| title_full_unstemmed | DVFS and Its Architectural Simulation Models for Improving Energy Efficiency of Complex Embedded Systems in Early Design Phase |
| title_short | DVFS and Its Architectural Simulation Models for Improving Energy Efficiency of Complex Embedded Systems in Early Design Phase |
| title_sort | dvfs and its architectural simulation models for improving energy efficiency of complex embedded systems in early design phase |
| topic | hardware-managed embedded systems architectural simulation run-time power management dvfs hardware-software co-design |
| url | https://www.mdpi.com/2073-431X/9/1/2 |
| work_keys_str_mv | AT parhamharirian dvfsanditsarchitecturalsimulationmodelsforimprovingenergyefficiencyofcomplexembeddedsystemsinearlydesignphase |