Interface Optimization and Transport Modulation of Sm<sub>2</sub>O<sub>3</sub>/InP Metal Oxide Semiconductor Capacitors with Atomic Layer Deposition-Derived Laminated Interlayer
In this paper, the effect of atomic layer deposition-derived laminated interlayer on the interface chemistry and transport characteristics of sputtering-deposited Sm<sub>2</sub>O<sub>3</sub>/InP gate stacks have been investigated systematically. Based on X-ray photoelectron s...
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MDPI AG
2021-12-01
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| Series: | Nanomaterials |
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| Online Access: | https://www.mdpi.com/2079-4991/11/12/3443 |
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| author | Jinyu Lu Gang He Jin Yan Zhenxiang Dai Ganhong Zheng Shanshan Jiang Lesheng Qiao Qian Gao Zebo Fang |
| author_facet | Jinyu Lu Gang He Jin Yan Zhenxiang Dai Ganhong Zheng Shanshan Jiang Lesheng Qiao Qian Gao Zebo Fang |
| author_sort | Jinyu Lu |
| collection | DOAJ |
| description | In this paper, the effect of atomic layer deposition-derived laminated interlayer on the interface chemistry and transport characteristics of sputtering-deposited Sm<sub>2</sub>O<sub>3</sub>/InP gate stacks have been investigated systematically. Based on X-ray photoelectron spectroscopy (XPS) measurements, it can be noted that ALD-derived Al<sub>2</sub>O<sub>3</sub> interface passivation layer significantly prevents the appearance of substrate diffusion oxides and substantially optimizes gate dielectric performance. The leakage current experimental results confirm that the Sm<sub>2</sub>O<sub>3</sub>/Al<sub>2</sub>O<sub>3</sub>/InP stacked gate dielectric structure exhibits a lower leakage current density than the other samples, reaching a value of 2.87 × 10<sup>−6</sup> A/cm<sup>2</sup>. In addition, conductivity analysis shows that high-quality metal oxide semiconductor capacitors based on Sm<sub>2</sub>O<sub>3</sub>/Al<sub>2</sub>O<sub>3</sub>/InP gate stacks have the lowest interfacial density of states (<i>D</i><sub>it</sub>) value of 1.05 × 10<sup>13</sup> cm<sup>−2</sup> eV<sup>−1</sup>. The conduction mechanisms of the InP-based MOS capacitors at low temperatures are not yet known, and to further explore the electron transport in InP-based MOS capacitors with different stacked gate dielectric structures, we placed samples for leakage current measurements at low varying temperatures (77–227 K). Based on the measurement results, Sm<sub>2</sub>O<sub>3</sub>/Al<sub>2</sub>O<sub>3</sub>/InP stacked gate dielectric is a promising candidate for InP-based metal oxide semiconductor field-effect-transistor devices (MOSFET) in the future. |
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| issn | 2079-4991 |
| language | English |
| last_indexed | 2024-03-10T03:25:35Z |
| publishDate | 2021-12-01 |
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| series | Nanomaterials |
| spelling | doaj.art-a335028b213d436798c98c6e39035a912023-11-23T09:52:41ZengMDPI AGNanomaterials2079-49912021-12-011112344310.3390/nano11123443Interface Optimization and Transport Modulation of Sm<sub>2</sub>O<sub>3</sub>/InP Metal Oxide Semiconductor Capacitors with Atomic Layer Deposition-Derived Laminated InterlayerJinyu Lu0Gang He1Jin Yan2Zhenxiang Dai3Ganhong Zheng4Shanshan Jiang5Lesheng Qiao6Qian Gao7Zebo Fang8School of Materials Science and Engineering, Anhui University, Hefei 230601, ChinaSchool of Materials Science and Engineering, Anhui University, Hefei 230601, ChinaSchool of Materials Science and Engineering, Anhui University, Hefei 230601, ChinaSchool of Physics and Optoelectronics Engineering, Anhui University, Hefei 230601, ChinaSchool of Materials Science and Engineering, Anhui University, Hefei 230601, ChinaSchool of Integration Circuits, Anhui University, Hefei 230601, ChinaSchool of Materials Science and Engineering, Anhui University, Hefei 230601, ChinaSchool of Materials Science and Engineering, Anhui University, Hefei 230601, ChinaSchool of Mathematical Information, Shaoxing University, Shaoxing 312000, ChinaIn this paper, the effect of atomic layer deposition-derived laminated interlayer on the interface chemistry and transport characteristics of sputtering-deposited Sm<sub>2</sub>O<sub>3</sub>/InP gate stacks have been investigated systematically. Based on X-ray photoelectron spectroscopy (XPS) measurements, it can be noted that ALD-derived Al<sub>2</sub>O<sub>3</sub> interface passivation layer significantly prevents the appearance of substrate diffusion oxides and substantially optimizes gate dielectric performance. The leakage current experimental results confirm that the Sm<sub>2</sub>O<sub>3</sub>/Al<sub>2</sub>O<sub>3</sub>/InP stacked gate dielectric structure exhibits a lower leakage current density than the other samples, reaching a value of 2.87 × 10<sup>−6</sup> A/cm<sup>2</sup>. In addition, conductivity analysis shows that high-quality metal oxide semiconductor capacitors based on Sm<sub>2</sub>O<sub>3</sub>/Al<sub>2</sub>O<sub>3</sub>/InP gate stacks have the lowest interfacial density of states (<i>D</i><sub>it</sub>) value of 1.05 × 10<sup>13</sup> cm<sup>−2</sup> eV<sup>−1</sup>. The conduction mechanisms of the InP-based MOS capacitors at low temperatures are not yet known, and to further explore the electron transport in InP-based MOS capacitors with different stacked gate dielectric structures, we placed samples for leakage current measurements at low varying temperatures (77–227 K). Based on the measurement results, Sm<sub>2</sub>O<sub>3</sub>/Al<sub>2</sub>O<sub>3</sub>/InP stacked gate dielectric is a promising candidate for InP-based metal oxide semiconductor field-effect-transistor devices (MOSFET) in the future.https://www.mdpi.com/2079-4991/11/12/3443MOS capacitorsSm<sub>2</sub>O<sub>3</sub> high-k gate dielectricatomic layer depositionconduction mechanismsinterface state density |
| spellingShingle | Jinyu Lu Gang He Jin Yan Zhenxiang Dai Ganhong Zheng Shanshan Jiang Lesheng Qiao Qian Gao Zebo Fang Interface Optimization and Transport Modulation of Sm<sub>2</sub>O<sub>3</sub>/InP Metal Oxide Semiconductor Capacitors with Atomic Layer Deposition-Derived Laminated Interlayer Nanomaterials MOS capacitors Sm<sub>2</sub>O<sub>3</sub> high-k gate dielectric atomic layer deposition conduction mechanisms interface state density |
| title | Interface Optimization and Transport Modulation of Sm<sub>2</sub>O<sub>3</sub>/InP Metal Oxide Semiconductor Capacitors with Atomic Layer Deposition-Derived Laminated Interlayer |
| title_full | Interface Optimization and Transport Modulation of Sm<sub>2</sub>O<sub>3</sub>/InP Metal Oxide Semiconductor Capacitors with Atomic Layer Deposition-Derived Laminated Interlayer |
| title_fullStr | Interface Optimization and Transport Modulation of Sm<sub>2</sub>O<sub>3</sub>/InP Metal Oxide Semiconductor Capacitors with Atomic Layer Deposition-Derived Laminated Interlayer |
| title_full_unstemmed | Interface Optimization and Transport Modulation of Sm<sub>2</sub>O<sub>3</sub>/InP Metal Oxide Semiconductor Capacitors with Atomic Layer Deposition-Derived Laminated Interlayer |
| title_short | Interface Optimization and Transport Modulation of Sm<sub>2</sub>O<sub>3</sub>/InP Metal Oxide Semiconductor Capacitors with Atomic Layer Deposition-Derived Laminated Interlayer |
| title_sort | interface optimization and transport modulation of sm sub 2 sub o sub 3 sub inp metal oxide semiconductor capacitors with atomic layer deposition derived laminated interlayer |
| topic | MOS capacitors Sm<sub>2</sub>O<sub>3</sub> high-k gate dielectric atomic layer deposition conduction mechanisms interface state density |
| url | https://www.mdpi.com/2079-4991/11/12/3443 |
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