Analysis of BDMOS and DTMOS Current Mirrors in 130 nm CMOS Technology
In this paper, an analysis of basic Current Mirror (CM) topologies was performed with a focus on comparison of conventional realization to Bulk-Driven (BD) and Dynamic-Threshold (DT) equivalents, in terms of main properties. These circuits were designed in 130 nm CMOS technology using the supply vol...
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| Format: | Article |
| Language: | English |
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VSB-Technical University of Ostrava
2018-01-01
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| Series: | Advances in Electrical and Electronic Engineering |
| Subjects: | |
| Online Access: | http://advances.utc.sk/index.php/AEEE/article/view/2747 |
| _version_ | 1797826989031161856 |
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| author | Matej Rakus Viera Stopjakova Daniel Arbet |
| author_facet | Matej Rakus Viera Stopjakova Daniel Arbet |
| author_sort | Matej Rakus |
| collection | DOAJ |
| description | In this paper, an analysis of basic Current Mirror (CM) topologies was performed with a focus on comparison of conventional realization to Bulk-Driven (BD) and Dynamic-Threshold (DT) equivalents, in terms of main properties. These circuits were designed in 130 nm CMOS technology using the supply voltage of 0.6 V and laid out on a test-chip. Fabricated circuits were analyzed and their characteristics compared to the simulation results. The achieved results prove that these unconventional circuit design techniques are quite promising for contemporary ultra low-voltage analog Integrated Circuits (ICs) |
| first_indexed | 2024-04-09T12:41:03Z |
| format | Article |
| id | doaj.art-aa25a5a2a44f4cf58e7573b36671b1b3 |
| institution | Directory Open Access Journal |
| issn | 1336-1376 1804-3119 |
| language | English |
| last_indexed | 2024-04-09T12:41:03Z |
| publishDate | 2018-01-01 |
| publisher | VSB-Technical University of Ostrava |
| record_format | Article |
| series | Advances in Electrical and Electronic Engineering |
| spelling | doaj.art-aa25a5a2a44f4cf58e7573b36671b1b32023-05-14T20:50:12ZengVSB-Technical University of OstravaAdvances in Electrical and Electronic Engineering1336-13761804-31192018-01-0116222623210.15598/aeee.v16i2.2747990Analysis of BDMOS and DTMOS Current Mirrors in 130 nm CMOS TechnologyMatej Rakus0Viera Stopjakova1Daniel Arbet2Institute of Electronics and Photonics, Faculty of Electrical Engineering and Information Technology, Slovak University of Technology, Ilkovičova 3, 81219 Bratislava, Slovak RepublicInstitute of Electronics and Photonics, Faculty of Electrical Engineering and Information Technology, Slovak University of Technology, Ilkovičova 3, 81219 Bratislava, Slovak RepublicInstitute of Electronics and Photonics, Faculty of Electrical Engineering and Information Technology, Slovak University of Technology, Ilkovičova 3, 81219 Bratislava, Slovak RepublicIn this paper, an analysis of basic Current Mirror (CM) topologies was performed with a focus on comparison of conventional realization to Bulk-Driven (BD) and Dynamic-Threshold (DT) equivalents, in terms of main properties. These circuits were designed in 130 nm CMOS technology using the supply voltage of 0.6 V and laid out on a test-chip. Fabricated circuits were analyzed and their characteristics compared to the simulation results. The achieved results prove that these unconventional circuit design techniques are quite promising for contemporary ultra low-voltage analog Integrated Circuits (ICs)http://advances.utc.sk/index.php/AEEE/article/view/2747analog circuitsbulk-drivencurrent mirrorsdynamic-thresholdlow-voltage circuits. |
| spellingShingle | Matej Rakus Viera Stopjakova Daniel Arbet Analysis of BDMOS and DTMOS Current Mirrors in 130 nm CMOS Technology Advances in Electrical and Electronic Engineering analog circuits bulk-driven current mirrors dynamic-threshold low-voltage circuits. |
| title | Analysis of BDMOS and DTMOS Current Mirrors in 130 nm CMOS Technology |
| title_full | Analysis of BDMOS and DTMOS Current Mirrors in 130 nm CMOS Technology |
| title_fullStr | Analysis of BDMOS and DTMOS Current Mirrors in 130 nm CMOS Technology |
| title_full_unstemmed | Analysis of BDMOS and DTMOS Current Mirrors in 130 nm CMOS Technology |
| title_short | Analysis of BDMOS and DTMOS Current Mirrors in 130 nm CMOS Technology |
| title_sort | analysis of bdmos and dtmos current mirrors in 130 nm cmos technology |
| topic | analog circuits bulk-driven current mirrors dynamic-threshold low-voltage circuits. |
| url | http://advances.utc.sk/index.php/AEEE/article/view/2747 |
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