Implementation of a digital trim scheme for SAR ADCs

Successive approximation register (SAR) analog-to-digital Converters (ADC) are based on a capacitive digital-to-analog converter (CDAC) (McCreary and Gray, 1975). The capacitor mismatch in the capacitor array of the CDAC impacts the differential non-linearity (DNL) of the ADC directly. In order to a...

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Main Authors: J. Bialek, A. Wickmann, F. Ohnhaeuser, G. Fischer, R. Weigel, T. Ussmueller
Format: Article
Language:deu
Published: Copernicus Publications 2013-07-01
Series:Advances in Radio Science
Online Access:http://www.adv-radio-sci.net/11/227/2013/ars-11-227-2013.pdf
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author J. Bialek
A. Wickmann
F. Ohnhaeuser
G. Fischer
R. Weigel
T. Ussmueller
author_facet J. Bialek
A. Wickmann
F. Ohnhaeuser
G. Fischer
R. Weigel
T. Ussmueller
author_sort J. Bialek
collection DOAJ
description Successive approximation register (SAR) analog-to-digital Converters (ADC) are based on a capacitive digital-to-analog converter (CDAC) (McCreary and Gray, 1975). The capacitor mismatch in the capacitor array of the CDAC impacts the differential non-linearity (DNL) of the ADC directly. In order to achieve a transfer function without missing codes, trimming of the capacitor array becomes necessary for SAR ADCs with a resolution of more than 12 bit. This article introduces a novel digital approach for trimming. DNL measurements of an 18 bit SAR ADC show that digital trimming allows the same performance as analog trimming. Digital trimming however reduces the power consumption of the ADC, the die size and the required time for the production test.
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spelling doaj.art-aa66d26ab3ae4243987adcb8510a99db2022-12-22T02:50:17ZdeuCopernicus PublicationsAdvances in Radio Science1684-99651684-99732013-07-011122723010.5194/ars-11-227-2013Implementation of a digital trim scheme for SAR ADCsJ. Bialek0A. Wickmann1F. Ohnhaeuser2G. Fischer3R. Weigel4T. Ussmueller5University of Erlangen-Nuremberg, Departement of Electrical Engineering, Erlangen, GermanyTexas Instruments Deutschland GmbH, GermanyTexas Instruments Deutschland GmbH, GermanyUniversity of Erlangen-Nuremberg, Departement of Electrical Engineering, Erlangen, GermanyUniversity of Erlangen-Nuremberg, Departement of Electrical Engineering, Erlangen, GermanyUniversity of Erlangen-Nuremberg, Departement of Electrical Engineering, Erlangen, GermanySuccessive approximation register (SAR) analog-to-digital Converters (ADC) are based on a capacitive digital-to-analog converter (CDAC) (McCreary and Gray, 1975). The capacitor mismatch in the capacitor array of the CDAC impacts the differential non-linearity (DNL) of the ADC directly. In order to achieve a transfer function without missing codes, trimming of the capacitor array becomes necessary for SAR ADCs with a resolution of more than 12 bit. This article introduces a novel digital approach for trimming. DNL measurements of an 18 bit SAR ADC show that digital trimming allows the same performance as analog trimming. Digital trimming however reduces the power consumption of the ADC, the die size and the required time for the production test.http://www.adv-radio-sci.net/11/227/2013/ars-11-227-2013.pdf
spellingShingle J. Bialek
A. Wickmann
F. Ohnhaeuser
G. Fischer
R. Weigel
T. Ussmueller
Implementation of a digital trim scheme for SAR ADCs
Advances in Radio Science
title Implementation of a digital trim scheme for SAR ADCs
title_full Implementation of a digital trim scheme for SAR ADCs
title_fullStr Implementation of a digital trim scheme for SAR ADCs
title_full_unstemmed Implementation of a digital trim scheme for SAR ADCs
title_short Implementation of a digital trim scheme for SAR ADCs
title_sort implementation of a digital trim scheme for sar adcs
url http://www.adv-radio-sci.net/11/227/2013/ars-11-227-2013.pdf
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