Benchmarking Delay and Energy of Neural Inference Circuits
Neural network circuits and architectures are currently under active research for applications to artificial intelligence and machine learning. Their physical performance metrics (area, time, and energy) are estimated. Various types of neural networks (artificial, cellular, spiking, and oscillator)...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
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IEEE
2019-01-01
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| Series: | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/8915808/ |
| _version_ | 1819171775946162176 |
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| author | Dmitri E. Nikonov Ian A. Young |
| author_facet | Dmitri E. Nikonov Ian A. Young |
| author_sort | Dmitri E. Nikonov |
| collection | DOAJ |
| description | Neural network circuits and architectures are currently under active research for applications to artificial intelligence and machine learning. Their physical performance metrics (area, time, and energy) are estimated. Various types of neural networks (artificial, cellular, spiking, and oscillator) are implemented with multiple CMOS and beyond-CMOS (spintronic, ferroelectric, and resistive memory) devices. A consistent and transparent methodology is proposed and used to benchmark this comprehensive set of options across several application cases. Promising architecture/device combinations are identified. |
| first_indexed | 2024-12-22T19:56:39Z |
| format | Article |
| id | doaj.art-b1014230227544fb9c2c1f55d4ab8cd4 |
| institution | Directory Open Access Journal |
| issn | 2329-9231 |
| language | English |
| last_indexed | 2024-12-22T19:56:39Z |
| publishDate | 2019-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits |
| spelling | doaj.art-b1014230227544fb9c2c1f55d4ab8cd42022-12-21T18:14:25ZengIEEEIEEE Journal on Exploratory Solid-State Computational Devices and Circuits2329-92312019-01-0152758410.1109/JXCDC.2019.29561128915808Benchmarking Delay and Energy of Neural Inference CircuitsDmitri E. Nikonov0https://orcid.org/0000-0002-1436-1267Ian A. Young1https://orcid.org/0000-0002-4017-5265Components Research, Intel Corporation, Hillsboro, OR, USAComponents Research, Intel Corporation, Hillsboro, OR, USANeural network circuits and architectures are currently under active research for applications to artificial intelligence and machine learning. Their physical performance metrics (area, time, and energy) are estimated. Various types of neural networks (artificial, cellular, spiking, and oscillator) are implemented with multiple CMOS and beyond-CMOS (spintronic, ferroelectric, and resistive memory) devices. A consistent and transparent methodology is proposed and used to benchmark this comprehensive set of options across several application cases. Promising architecture/device combinations are identified.https://ieeexplore.ieee.org/document/8915808/Benchmarkingbeyond-CMOSCNNneural networkneuromorphicpower |
| spellingShingle | Dmitri E. Nikonov Ian A. Young Benchmarking Delay and Energy of Neural Inference Circuits IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Benchmarking beyond-CMOS CNN neural network neuromorphic power |
| title | Benchmarking Delay and Energy of Neural Inference Circuits |
| title_full | Benchmarking Delay and Energy of Neural Inference Circuits |
| title_fullStr | Benchmarking Delay and Energy of Neural Inference Circuits |
| title_full_unstemmed | Benchmarking Delay and Energy of Neural Inference Circuits |
| title_short | Benchmarking Delay and Energy of Neural Inference Circuits |
| title_sort | benchmarking delay and energy of neural inference circuits |
| topic | Benchmarking beyond-CMOS CNN neural network neuromorphic power |
| url | https://ieeexplore.ieee.org/document/8915808/ |
| work_keys_str_mv | AT dmitrienikonov benchmarkingdelayandenergyofneuralinferencecircuits AT ianayoung benchmarkingdelayandenergyofneuralinferencecircuits |