Design of VGSOT-MTJ-Based Logic Locking for High-Speed Digital Circuits

Emerging spintronics devices in recent research have received much interest in various fields. Their unique physical aspects are being explored to keep Moore’s law alive. Therefore, the hardware security aspects of system-on-a-chip (SoC) designs using spintronics devices becomes important. Magnetic...

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Main Authors: Divyanshu Divyanshu, Rajat Kumar, Danial Khan, Selma Amara, Yehia Massoud
Format: Article
Language:English
Published: MDPI AG 2022-10-01
Series:Electronics
Subjects:
Online Access:https://www.mdpi.com/2079-9292/11/21/3537
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author Divyanshu Divyanshu
Rajat Kumar
Danial Khan
Selma Amara
Yehia Massoud
author_facet Divyanshu Divyanshu
Rajat Kumar
Danial Khan
Selma Amara
Yehia Massoud
author_sort Divyanshu Divyanshu
collection DOAJ
description Emerging spintronics devices in recent research have received much interest in various fields. Their unique physical aspects are being explored to keep Moore’s law alive. Therefore, the hardware security aspects of system-on-a-chip (SoC) designs using spintronics devices becomes important. Magnetic tunnel junctions (MTJ) are a potential candidate in spintronics-based devices for beyond-CMOS applications. This work uses voltage-gated spin-orbit torque-assisted magnetic tunnel junction (VGSOT-MTJ) based on the Verilog-A behavioral model to design a possible logic-locking system for hardware security. Compared with the SOT MTJ, which uses a heavy metal strip below the MTJ stack, VGSOT-MTJ has an antiferromagnetic (AFM) strip that utilizes the voltage-controlled magnetic anisotropy (VCMA) effect to significantly reduce the <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><msub><mi>J</mi><mrow><mi>S</mi><mi>O</mi><mi>T</mi><mo>,</mo><mi>c</mi><mi>r</mi><mi>i</mi><mi>t</mi><mi>i</mi><mi>c</mi><mi>a</mi><mi>l</mi></mrow></msub></semantics></math></inline-formula>. To design the logic-locking block, we performed a Monte Carlo analysis to account for the effect of process variation (PV) on critical MTJ parameters. Eye diagram tests and mask designing were performed, which included the effect of thermal noise and PV for high-speed digital circuit operations. Finally, transient performance was analyzed to demonstrate the VGSOT-MTJ’s ability to design logic-locking blocks from the circuit operation perspective.
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spelling doaj.art-b11293b7a29e4f999e4f4abd78d7e6ca2023-11-24T04:25:30ZengMDPI AGElectronics2079-92922022-10-011121353710.3390/electronics11213537Design of VGSOT-MTJ-Based Logic Locking for High-Speed Digital CircuitsDivyanshu Divyanshu0Rajat Kumar1Danial Khan2Selma Amara3Yehia Massoud4Innovative Technologies Laboratories (ITL), King Abdullah University of Science and Technology (KAUST), Thuwal 23955-6900, Saudi ArabiaInnovative Technologies Laboratories (ITL), King Abdullah University of Science and Technology (KAUST), Thuwal 23955-6900, Saudi ArabiaInnovative Technologies Laboratories (ITL), King Abdullah University of Science and Technology (KAUST), Thuwal 23955-6900, Saudi ArabiaInnovative Technologies Laboratories (ITL), King Abdullah University of Science and Technology (KAUST), Thuwal 23955-6900, Saudi ArabiaInnovative Technologies Laboratories (ITL), King Abdullah University of Science and Technology (KAUST), Thuwal 23955-6900, Saudi ArabiaEmerging spintronics devices in recent research have received much interest in various fields. Their unique physical aspects are being explored to keep Moore’s law alive. Therefore, the hardware security aspects of system-on-a-chip (SoC) designs using spintronics devices becomes important. Magnetic tunnel junctions (MTJ) are a potential candidate in spintronics-based devices for beyond-CMOS applications. This work uses voltage-gated spin-orbit torque-assisted magnetic tunnel junction (VGSOT-MTJ) based on the Verilog-A behavioral model to design a possible logic-locking system for hardware security. Compared with the SOT MTJ, which uses a heavy metal strip below the MTJ stack, VGSOT-MTJ has an antiferromagnetic (AFM) strip that utilizes the voltage-controlled magnetic anisotropy (VCMA) effect to significantly reduce the <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><msub><mi>J</mi><mrow><mi>S</mi><mi>O</mi><mi>T</mi><mo>,</mo><mi>c</mi><mi>r</mi><mi>i</mi><mi>t</mi><mi>i</mi><mi>c</mi><mi>a</mi><mi>l</mi></mrow></msub></semantics></math></inline-formula>. To design the logic-locking block, we performed a Monte Carlo analysis to account for the effect of process variation (PV) on critical MTJ parameters. Eye diagram tests and mask designing were performed, which included the effect of thermal noise and PV for high-speed digital circuit operations. Finally, transient performance was analyzed to demonstrate the VGSOT-MTJ’s ability to design logic-locking blocks from the circuit operation perspective.https://www.mdpi.com/2079-9292/11/21/3537hardware securitymagnetic tunnel junction (MTJ)spintronicsvoltage-gated spin-orbit torque (VGSOT)voltage-controlled magnetic anisotropy (VCMA)
spellingShingle Divyanshu Divyanshu
Rajat Kumar
Danial Khan
Selma Amara
Yehia Massoud
Design of VGSOT-MTJ-Based Logic Locking for High-Speed Digital Circuits
Electronics
hardware security
magnetic tunnel junction (MTJ)
spintronics
voltage-gated spin-orbit torque (VGSOT)
voltage-controlled magnetic anisotropy (VCMA)
title Design of VGSOT-MTJ-Based Logic Locking for High-Speed Digital Circuits
title_full Design of VGSOT-MTJ-Based Logic Locking for High-Speed Digital Circuits
title_fullStr Design of VGSOT-MTJ-Based Logic Locking for High-Speed Digital Circuits
title_full_unstemmed Design of VGSOT-MTJ-Based Logic Locking for High-Speed Digital Circuits
title_short Design of VGSOT-MTJ-Based Logic Locking for High-Speed Digital Circuits
title_sort design of vgsot mtj based logic locking for high speed digital circuits
topic hardware security
magnetic tunnel junction (MTJ)
spintronics
voltage-gated spin-orbit torque (VGSOT)
voltage-controlled magnetic anisotropy (VCMA)
url https://www.mdpi.com/2079-9292/11/21/3537
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