| Summary: | This work presents a new method for the Verilog-A implementation of Lorentzian noise models, in a module called <italic>VERILOR</italic>, which can automatically generate either Lorentzian or 1/f-like noise spectra depending on the trap density and gate oxide area, for all bias conditions, in a one-step simulation. Based on statistical experimental data, we demonstrate the importance of Lorentzian noise modeling in contrast to classic frequency domain 1/f or time domain Random Telegraph Noise (RTN) modeling, in terms of PSD, total noise power, and device-to-device noise variability reproduction. Moreover, we validate the applicability of <italic>VERILOR</italic> in circuit simulators in both frequency and time domain, and how it can enable precise noise variability studies at a circuit level. Finally, fundamental digital and analog circuits such as the Ring Oscillator are used to showcase the usefulness and applicability of the <italic>VERILOR</italic> model in circuit noise simulations.
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