A Synthesized Framework for Formal Verification of Computing Systems
Design process of computing systems gradually evolved to a level that encompasses formal verification techniques. However, the integration of formal verification techniques into a methodical design procedure has many inherent miscomprehensions and problems. The paper explicates the discrepancy betwe...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
International Institute of Informatics and Cybernetics
2003-12-01
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| Series: | Journal of Systemics, Cybernetics and Informatics |
| Subjects: | |
| Online Access: | http://www.iiisci.org/Journal/CV$/sci/pdfs/P976436.pdf
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