Simplified Second-Order Generalized Integrator - Frequency-Locked Loop
Second-Order Generalized Integrator -- Frequency-Locked Loop (SOGI-FLL) is a popular technique available in the grid synchronization literature. This technique uses gain normalization in the frequency locked-loop. This increases the computational complexity. In this paper, we propose an alternative...
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| Format: | Article |
| Language: | English |
| Published: |
VSB-Technical University of Ostrava
2019-01-01
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| Series: | Advances in Electrical and Electronic Engineering |
| Subjects: | |
| Online Access: | http://advances.utc.sk/index.php/AEEE/article/view/3540 |
| _version_ | 1797826992234561536 |
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| author | Hafiz Ahmed Mohamed Benbouzid |
| author_facet | Hafiz Ahmed Mohamed Benbouzid |
| author_sort | Hafiz Ahmed |
| collection | DOAJ |
| description | Second-Order Generalized Integrator -- Frequency-Locked Loop (SOGI-FLL) is a popular technique available in the grid synchronization literature. This technique uses gain normalization in the frequency locked-loop. This increases the computational complexity. In this paper, we propose an alternative implementation to reduce the computational complexity of the SOGI-FLL. The proposed implementation modifies mainly the frequency locked-loop part and requires normalized voltage measurement. dSPACE 1104 board-based hardware implementation shows that the proposed implementation executes 20% faster than the standard implementation. This could be very beneficial for high switching frequency application e.g. >= 1MHz. In addition to the nominal frequency case, multi-resonant implementation is also proposed to tackle grid harmonics using a~simpler harmonic decoupling network. Small signal dynamical modeling and tuning are performed for both implementations. Dynamical equivalence is also established between the two implementations. Experimental comparative analysis demonstrates similar or better performance (depending on test scenarios) with respect to the standard implementation of the SOGI-FLL. |
| first_indexed | 2024-04-09T12:41:06Z |
| format | Article |
| id | doaj.art-b3cbd478fe254870b9fe09583c6f1129 |
| institution | Directory Open Access Journal |
| issn | 1336-1376 1804-3119 |
| language | English |
| last_indexed | 2024-04-09T12:41:06Z |
| publishDate | 2019-01-01 |
| publisher | VSB-Technical University of Ostrava |
| record_format | Article |
| series | Advances in Electrical and Electronic Engineering |
| spelling | doaj.art-b3cbd478fe254870b9fe09583c6f11292023-05-14T20:50:13ZengVSB-Technical University of OstravaAdvances in Electrical and Electronic Engineering1336-13761804-31192019-01-0117440541210.15598/aeee.v17i4.35401067Simplified Second-Order Generalized Integrator - Frequency-Locked LoopHafiz Ahmed0Mohamed Benbouzid1School of Mechanical, Aerospace and Automotive Engineering, Faculty of Engineering, Environment and Computing, Coventry University, Priory Street, CV1 5FB Coventry, United KingdomDepartment of Electrical Engineering, UMR CNRS 6027 IRDL, University of Brest, 3 Rue des Archives, 29238 Brest, France & Department of Electrical Engineering, Shanghai Maritime University, 1550 Haigang Ave, 201306 Shanghai, ChinaSecond-Order Generalized Integrator -- Frequency-Locked Loop (SOGI-FLL) is a popular technique available in the grid synchronization literature. This technique uses gain normalization in the frequency locked-loop. This increases the computational complexity. In this paper, we propose an alternative implementation to reduce the computational complexity of the SOGI-FLL. The proposed implementation modifies mainly the frequency locked-loop part and requires normalized voltage measurement. dSPACE 1104 board-based hardware implementation shows that the proposed implementation executes 20% faster than the standard implementation. This could be very beneficial for high switching frequency application e.g. >= 1MHz. In addition to the nominal frequency case, multi-resonant implementation is also proposed to tackle grid harmonics using a~simpler harmonic decoupling network. Small signal dynamical modeling and tuning are performed for both implementations. Dynamical equivalence is also established between the two implementations. Experimental comparative analysis demonstrates similar or better performance (depending on test scenarios) with respect to the standard implementation of the SOGI-FLL.http://advances.utc.sk/index.php/AEEE/article/view/3540second-order generalized integratorfrequency locked-loofrequency estimationphase estimation |
| spellingShingle | Hafiz Ahmed Mohamed Benbouzid Simplified Second-Order Generalized Integrator - Frequency-Locked Loop Advances in Electrical and Electronic Engineering second-order generalized integrator frequency locked-loo frequency estimation phase estimation |
| title | Simplified Second-Order Generalized Integrator - Frequency-Locked Loop |
| title_full | Simplified Second-Order Generalized Integrator - Frequency-Locked Loop |
| title_fullStr | Simplified Second-Order Generalized Integrator - Frequency-Locked Loop |
| title_full_unstemmed | Simplified Second-Order Generalized Integrator - Frequency-Locked Loop |
| title_short | Simplified Second-Order Generalized Integrator - Frequency-Locked Loop |
| title_sort | simplified second order generalized integrator frequency locked loop |
| topic | second-order generalized integrator frequency locked-loo frequency estimation phase estimation |
| url | http://advances.utc.sk/index.php/AEEE/article/view/3540 |
| work_keys_str_mv | AT hafizahmed simplifiedsecondordergeneralizedintegratorfrequencylockedloop AT mohamedbenbouzid simplifiedsecondordergeneralizedintegratorfrequencylockedloop |