An Active Track and Hold Circuit With Linearity Enhancement Technique and Its Analysis Using Volterra Series
This paper presents a comprehensive analysis of active track and hold (T/H) circuits that utilize switched source followers and time-divided post-distortion cancellation. In the track phase, the circuit acts as an active buffer and transfers an input signal, including track-mode distortion caused by...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
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IEEE
2024-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/10423010/ |
| _version_ | 1797271553811939328 |
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| author | Junyoung Jang Geunhaeng Lee Tae Wook Kim |
| author_facet | Junyoung Jang Geunhaeng Lee Tae Wook Kim |
| author_sort | Junyoung Jang |
| collection | DOAJ |
| description | This paper presents a comprehensive analysis of active track and hold (T/H) circuits that utilize switched source followers and time-divided post-distortion cancellation. In the track phase, the circuit acts as an active buffer and transfers an input signal, including track-mode distortion caused by the buffer’s nonlinear transconductance. In the hold phase, the transferred signal is held but hold-mode distortion is added, including hold-mode feed-through and hold pedestal error, causing deterioration of the circuit’s linearity. The time-divided post-distortion cancellation technique improves the circuit’s linearity by cancelling the track-mode distortion with the hold-mode distortion. Volterra series analysis offers a comprehensive understanding of the operation. 17 sample chips were measured to verify stable cancellation operation. It shows a mean SFDR value of 77.1 dB and a standard deviation of 1.8 dB with 9mW power consumption. |
| first_indexed | 2024-03-07T14:05:15Z |
| format | Article |
| id | doaj.art-b789d17805474da1b10e80ba38ab81a5 |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-03-07T14:05:15Z |
| publishDate | 2024-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-b789d17805474da1b10e80ba38ab81a52024-03-07T00:00:22ZengIEEEIEEE Access2169-35362024-01-0112324823249210.1109/ACCESS.2024.336291010423010An Active Track and Hold Circuit With Linearity Enhancement Technique and Its Analysis Using Volterra SeriesJunyoung Jang0https://orcid.org/0000-0001-8022-4343Geunhaeng Lee1https://orcid.org/0000-0001-7309-5133Tae Wook Kim2https://orcid.org/0000-0002-9383-1860School of Electrical and Electronic Engineering, Yonsei University, Seoul, South KoreaDepartment of Electronic Engineering, Andong National University, Andong, Republic of KoreaSchool of Electrical and Electronic Engineering, Yonsei University, Seoul, South KoreaThis paper presents a comprehensive analysis of active track and hold (T/H) circuits that utilize switched source followers and time-divided post-distortion cancellation. In the track phase, the circuit acts as an active buffer and transfers an input signal, including track-mode distortion caused by the buffer’s nonlinear transconductance. In the hold phase, the transferred signal is held but hold-mode distortion is added, including hold-mode feed-through and hold pedestal error, causing deterioration of the circuit’s linearity. The time-divided post-distortion cancellation technique improves the circuit’s linearity by cancelling the track-mode distortion with the hold-mode distortion. Volterra series analysis offers a comprehensive understanding of the operation. 17 sample chips were measured to verify stable cancellation operation. It shows a mean SFDR value of 77.1 dB and a standard deviation of 1.8 dB with 9mW power consumption.https://ieeexplore.ieee.org/document/10423010/CMOStrack and holdRF samplingsource followerVolterra analysisdistortion cancellation |
| spellingShingle | Junyoung Jang Geunhaeng Lee Tae Wook Kim An Active Track and Hold Circuit With Linearity Enhancement Technique and Its Analysis Using Volterra Series IEEE Access CMOS track and hold RF sampling source follower Volterra analysis distortion cancellation |
| title | An Active Track and Hold Circuit With Linearity Enhancement Technique and Its Analysis Using Volterra Series |
| title_full | An Active Track and Hold Circuit With Linearity Enhancement Technique and Its Analysis Using Volterra Series |
| title_fullStr | An Active Track and Hold Circuit With Linearity Enhancement Technique and Its Analysis Using Volterra Series |
| title_full_unstemmed | An Active Track and Hold Circuit With Linearity Enhancement Technique and Its Analysis Using Volterra Series |
| title_short | An Active Track and Hold Circuit With Linearity Enhancement Technique and Its Analysis Using Volterra Series |
| title_sort | active track and hold circuit with linearity enhancement technique and its analysis using volterra series |
| topic | CMOS track and hold RF sampling source follower Volterra analysis distortion cancellation |
| url | https://ieeexplore.ieee.org/document/10423010/ |
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