Technology Mapping of Multi–Output Functions Leading to the Reduction of Dynamic Power Consumption in FPGAS

This article presents a synthesis strategy aimed at minimizing the dynamic power consumption of combinational circuits mapped in LUT blocks of FPGAs. The implemented circuits represent the mapping of multi-output functions. Properly selected multi-output functions are described using a new form of t...

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Main Authors: Opara Adam, Kubica Marcin
Format: Article
Language:English
Published: Sciendo 2023-06-01
Series:International Journal of Applied Mathematics and Computer Science
Subjects:
Online Access:https://doi.org/10.34768/amcs-2023-0020
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author Opara Adam
Kubica Marcin
author_facet Opara Adam
Kubica Marcin
author_sort Opara Adam
collection DOAJ
description This article presents a synthesis strategy aimed at minimizing the dynamic power consumption of combinational circuits mapped in LUT blocks of FPGAs. The implemented circuits represent the mapping of multi-output functions. Properly selected multi-output functions are described using a new form of the binary decision diagram (BDD), which is an extension of pseudomulti-terminal BDDs (PMTBDDs) in the literature. The essence of limiting power consumption is to include additional parameters during decomposition, such as the switching activity associated with the switching PMTBDD (SWPMTBDD). In addition, we highlight the key importance of circuit optimization methods via non-disjoint decomposition when minimizing power consumption. An algorithm is proposed to assess the effectiveness of decomposition, considering several parameters, such as the number of non-disjoint decompositions as well as that of shared and non-shared bound functions or the switching activity. The results of experiments that demonstrate the effectiveness of the proposed methods are also included.
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spelling doaj.art-b88c2a7597764748a819ebd891bb8c4a2023-06-26T10:48:37ZengSciendoInternational Journal of Applied Mathematics and Computer Science2083-84922023-06-0133226728410.34768/amcs-2023-0020Technology Mapping of Multi–Output Functions Leading to the Reduction of Dynamic Power Consumption in FPGASOpara Adam0Kubica Marcin11Department of Graphics, Computer Vision and Digital SystemsSilesian University of Technology ul. Akademicka 2A, 44-100Gliwice, Poland2Department of Digital Systems, Silesian University of Technology ul. Akademicka 2A, 44-100Gliwice, PolandThis article presents a synthesis strategy aimed at minimizing the dynamic power consumption of combinational circuits mapped in LUT blocks of FPGAs. The implemented circuits represent the mapping of multi-output functions. Properly selected multi-output functions are described using a new form of the binary decision diagram (BDD), which is an extension of pseudomulti-terminal BDDs (PMTBDDs) in the literature. The essence of limiting power consumption is to include additional parameters during decomposition, such as the switching activity associated with the switching PMTBDD (SWPMTBDD). In addition, we highlight the key importance of circuit optimization methods via non-disjoint decomposition when minimizing power consumption. An algorithm is proposed to assess the effectiveness of decomposition, considering several parameters, such as the number of non-disjoint decompositions as well as that of shared and non-shared bound functions or the switching activity. The results of experiments that demonstrate the effectiveness of the proposed methods are also included.https://doi.org/10.34768/amcs-2023-0020low power synthesisfpgaswitching activitydecompositiontechnology mapping
spellingShingle Opara Adam
Kubica Marcin
Technology Mapping of Multi–Output Functions Leading to the Reduction of Dynamic Power Consumption in FPGAS
International Journal of Applied Mathematics and Computer Science
low power synthesis
fpga
switching activity
decomposition
technology mapping
title Technology Mapping of Multi–Output Functions Leading to the Reduction of Dynamic Power Consumption in FPGAS
title_full Technology Mapping of Multi–Output Functions Leading to the Reduction of Dynamic Power Consumption in FPGAS
title_fullStr Technology Mapping of Multi–Output Functions Leading to the Reduction of Dynamic Power Consumption in FPGAS
title_full_unstemmed Technology Mapping of Multi–Output Functions Leading to the Reduction of Dynamic Power Consumption in FPGAS
title_short Technology Mapping of Multi–Output Functions Leading to the Reduction of Dynamic Power Consumption in FPGAS
title_sort technology mapping of multi output functions leading to the reduction of dynamic power consumption in fpgas
topic low power synthesis
fpga
switching activity
decomposition
technology mapping
url https://doi.org/10.34768/amcs-2023-0020
work_keys_str_mv AT oparaadam technologymappingofmultioutputfunctionsleadingtothereductionofdynamicpowerconsumptioninfpgas
AT kubicamarcin technologymappingofmultioutputfunctionsleadingtothereductionofdynamicpowerconsumptioninfpgas