Design of an ultra low power third order continuous time current mode ΣΔ modulator for WLAN applications
This paper presents a third order continuous time current mode ΣΔ modulator for WLAN 802.11b standard applications. The proposed circuit utilized feedback architecture with scaled and optimized DAC coefficients. At circuit level, we propose a modified cascade current mirror integrator with reduced i...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Elsevier
2014-05-01
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| Series: | Journal of Advanced Research |
| Subjects: | |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S2090123213000829 |
| Summary: | This paper presents a third order continuous time current mode ΣΔ modulator for WLAN 802.11b standard applications. The proposed circuit utilized feedback architecture with scaled and optimized DAC coefficients. At circuit level, we propose a modified cascade current mirror integrator with reduced input impedance which results in more bandwidth and linearity and hence improves the dynamic range. Also, a very fast and precise novel dynamic latch based current comparator is introduced with low power consumption. This ultra fast comparator facilitates increasing the sampling rate toward GHz frequencies. The modulator exhibits dynamic range of more than 60 dB for 20 MHz signal bandwidth and OSR of 10 while consuming only 914 μW from 1.8 V power supply. The FoM of the modulator is calculated from two different methods, and excellent performance is achieved for proposed modulator. |
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| ISSN: | 2090-1232 2090-1224 |