Comprehensive Study of SDC Memristors for Resistive RAM Applications
Memristors have garnered considerable attention within the scientific community as devices for emerging construction of Very Large Scale Integration (VLSI) systems. Owing to their inherent properties, they appear to be promising candidates for pivotal components in computational architectures, offer...
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| Format: | Article |
| Language: | English |
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MDPI AG
2024-01-01
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| Series: | Energies |
| Subjects: | |
| Online Access: | https://www.mdpi.com/1996-1073/17/2/467 |
| _version_ | 1797344174664581120 |
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| author | Bartłomiej Garda Karol Bednarz |
| author_facet | Bartłomiej Garda Karol Bednarz |
| author_sort | Bartłomiej Garda |
| collection | DOAJ |
| description | Memristors have garnered considerable attention within the scientific community as devices for emerging construction of Very Large Scale Integration (VLSI) systems. Owing to their inherent properties, they appear to be promising candidates for pivotal components in computational architectures, offering alternatives to the conventional von Neumann architectures. This work has focused on exploring potential applications of Self-Directed Channel (SDC) memristors as novel RRAM memory cells. The introductory section of the study is dedicated to evaluating the repeatability of the tested memristors. Subsequently, a detailed account of the binary programming testing process for memristors is provided, along with illustrative characteristics depicting the impact of programming pulses on a memory cell constructed from a memristor. A comprehensive data analysis was then conducted, comparing memristors with varying types of doping. The results revealed that SDC memristors exhibit a high level of switching, certainty between the Low Resistance State (LRS) and High Resistance State (HRS), suggesting their capability to facilitate the storage of multiple bits within a single memory cell. |
| first_indexed | 2024-03-08T10:58:32Z |
| format | Article |
| id | doaj.art-bcc3c4352249445a822134b7b81dd6d5 |
| institution | Directory Open Access Journal |
| issn | 1996-1073 |
| language | English |
| last_indexed | 2024-03-08T10:58:32Z |
| publishDate | 2024-01-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Energies |
| spelling | doaj.art-bcc3c4352249445a822134b7b81dd6d52024-01-26T16:20:15ZengMDPI AGEnergies1996-10732024-01-0117246710.3390/en17020467Comprehensive Study of SDC Memristors for Resistive RAM ApplicationsBartłomiej Garda0Karol Bednarz1Faculty of Electrical Engineering, Automatics, Computer Science and Biomedical Engineering, AGH University of Kraków, al. Mickiewicza 30, 30-059 Krakow, PolandFaculty of Electrical Engineering, Automatics, Computer Science and Biomedical Engineering, AGH University of Kraków, al. Mickiewicza 30, 30-059 Krakow, PolandMemristors have garnered considerable attention within the scientific community as devices for emerging construction of Very Large Scale Integration (VLSI) systems. Owing to their inherent properties, they appear to be promising candidates for pivotal components in computational architectures, offering alternatives to the conventional von Neumann architectures. This work has focused on exploring potential applications of Self-Directed Channel (SDC) memristors as novel RRAM memory cells. The introductory section of the study is dedicated to evaluating the repeatability of the tested memristors. Subsequently, a detailed account of the binary programming testing process for memristors is provided, along with illustrative characteristics depicting the impact of programming pulses on a memory cell constructed from a memristor. A comprehensive data analysis was then conducted, comparing memristors with varying types of doping. The results revealed that SDC memristors exhibit a high level of switching, certainty between the Low Resistance State (LRS) and High Resistance State (HRS), suggesting their capability to facilitate the storage of multiple bits within a single memory cell.https://www.mdpi.com/1996-1073/17/2/467SDC memristorresistive RAMmemristor programmingnon-linear circuit |
| spellingShingle | Bartłomiej Garda Karol Bednarz Comprehensive Study of SDC Memristors for Resistive RAM Applications Energies SDC memristor resistive RAM memristor programming non-linear circuit |
| title | Comprehensive Study of SDC Memristors for Resistive RAM Applications |
| title_full | Comprehensive Study of SDC Memristors for Resistive RAM Applications |
| title_fullStr | Comprehensive Study of SDC Memristors for Resistive RAM Applications |
| title_full_unstemmed | Comprehensive Study of SDC Memristors for Resistive RAM Applications |
| title_short | Comprehensive Study of SDC Memristors for Resistive RAM Applications |
| title_sort | comprehensive study of sdc memristors for resistive ram applications |
| topic | SDC memristor resistive RAM memristor programming non-linear circuit |
| url | https://www.mdpi.com/1996-1073/17/2/467 |
| work_keys_str_mv | AT bartłomiejgarda comprehensivestudyofsdcmemristorsforresistiveramapplications AT karolbednarz comprehensivestudyofsdcmemristorsforresistiveramapplications |