TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems

Recently, high-performance embedded systems have adopted phase change memory (PCM) as their main memory because PCMs have attractive advantages, such as non-volatility, byte-addressability, high density, and low power consumption. However, PCMs have disadvantages, such as limited write endurance in...

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Main Authors: Jun Hyeong Choi, Kyung Min Kim, Jong Wook Kwak
Format: Article
Language:English
Published: MDPI AG 2021-05-01
Series:Electronics
Subjects:
Online Access:https://www.mdpi.com/2079-9292/10/9/1111
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author Jun Hyeong Choi
Kyung Min Kim
Jong Wook Kwak
author_facet Jun Hyeong Choi
Kyung Min Kim
Jong Wook Kwak
author_sort Jun Hyeong Choi
collection DOAJ
description Recently, high-performance embedded systems have adopted phase change memory (PCM) as their main memory because PCMs have attractive advantages, such as non-volatility, byte-addressability, high density, and low power consumption. However, PCMs have disadvantages, such as limited write endurance in each cell and high write latency compared to DRAMs. Therefore, researchers have investigated methods for enhancing the limitations of PCMs. In this paper, we propose a page replacement policy called tendency-aware CLOCK (TA-CLOCK) for the hybrid main memory of embedded systems. To improve the limited write endurance of PCMs, TA-CLOCK classifies the page access tendency of the victim page through access pattern analysis and determines the migration location of the victim page. Through the classification of the page access tendency, TA-CLOCK reduces unnecessary page migrations from DRAMs to PCMs. Unnecessary migrations cause an increase in write operations in PCMs and the energy consumption of the hybrid main memory in embedded systems. Thus, our proposed policy improves the limited write endurance of PCMs and enhances the access latency of the hybrid main memory of embedded systems by classifying the page access tendency. We compared the TA-CLOCK with existing page replacement policies to evaluate its performance. In our experiments, TA-CLOCK reduced the number of write operations in PCMs by 71.5% on average, and it enhanced the energy delay product by 38.3% on average compared with other page replacement policies.
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spelling doaj.art-c1a4b8565bd347edbee9fac9522ae1332023-11-21T18:48:54ZengMDPI AGElectronics2079-92922021-05-01109111110.3390/electronics10091111TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded SystemsJun Hyeong Choi0Kyung Min Kim1Jong Wook Kwak2Department of Computer Engineering, Yeungnam University, Gyeongsan 38541, KoreaDepartment of Computer Engineering, Yeungnam University, Gyeongsan 38541, KoreaDepartment of Computer Engineering, Yeungnam University, Gyeongsan 38541, KoreaRecently, high-performance embedded systems have adopted phase change memory (PCM) as their main memory because PCMs have attractive advantages, such as non-volatility, byte-addressability, high density, and low power consumption. However, PCMs have disadvantages, such as limited write endurance in each cell and high write latency compared to DRAMs. Therefore, researchers have investigated methods for enhancing the limitations of PCMs. In this paper, we propose a page replacement policy called tendency-aware CLOCK (TA-CLOCK) for the hybrid main memory of embedded systems. To improve the limited write endurance of PCMs, TA-CLOCK classifies the page access tendency of the victim page through access pattern analysis and determines the migration location of the victim page. Through the classification of the page access tendency, TA-CLOCK reduces unnecessary page migrations from DRAMs to PCMs. Unnecessary migrations cause an increase in write operations in PCMs and the energy consumption of the hybrid main memory in embedded systems. Thus, our proposed policy improves the limited write endurance of PCMs and enhances the access latency of the hybrid main memory of embedded systems by classifying the page access tendency. We compared the TA-CLOCK with existing page replacement policies to evaluate its performance. In our experiments, TA-CLOCK reduced the number of write operations in PCMs by 71.5% on average, and it enhanced the energy delay product by 38.3% on average compared with other page replacement policies.https://www.mdpi.com/2079-9292/10/9/1111non-volatile memoryphase change memoryhybrid main memorypage replacement policytendency classificationclock algorithm
spellingShingle Jun Hyeong Choi
Kyung Min Kim
Jong Wook Kwak
TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems
Electronics
non-volatile memory
phase change memory
hybrid main memory
page replacement policy
tendency classification
clock algorithm
title TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems
title_full TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems
title_fullStr TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems
title_full_unstemmed TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems
title_short TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems
title_sort ta clock tendency aware page replacement policy for hybrid main memory in high performance embedded systems
topic non-volatile memory
phase change memory
hybrid main memory
page replacement policy
tendency classification
clock algorithm
url https://www.mdpi.com/2079-9292/10/9/1111
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AT kyungminkim taclocktendencyawarepagereplacementpolicyforhybridmainmemoryinhighperformanceembeddedsystems
AT jongwookkwak taclocktendencyawarepagereplacementpolicyforhybridmainmemoryinhighperformanceembeddedsystems