Efficient VLSI Architecture for Training Radial Basis Function Networks

This paper presents a novel VLSI architecture for the training of radial basis function (RBF) networks. The architecture contains the circuits for fuzzy C-means (FCM) and the recursive Least Mean Square (LMS) operations. The FCM circuit is designed for the training of centers in the hidden layer of...

Full description

Bibliographic Details
Main Authors: Wen-Jyi Hwang, Zhe-Cheng Fan
Format: Article
Language:English
Published: MDPI AG 2013-03-01
Series:Sensors
Subjects:
Online Access:http://www.mdpi.com/1424-8220/13/3/3848
_version_ 1811297837805207552
author Wen-Jyi Hwang
Zhe-Cheng Fan
author_facet Wen-Jyi Hwang
Zhe-Cheng Fan
author_sort Wen-Jyi Hwang
collection DOAJ
description This paper presents a novel VLSI architecture for the training of radial basis function (RBF) networks. The architecture contains the circuits for fuzzy C-means (FCM) and the recursive Least Mean Square (LMS) operations. The FCM circuit is designed for the training of centers in the hidden layer of the RBF network. The recursive LMS circuit is adopted for the training of connecting weights in the output layer. The architecture is implemented by the field programmable gate array (FPGA). It is used as a hardware accelerator in a system on programmable chip (SOPC) for real-time training and classification. Experimental results reveal that the proposed RBF architecture is an effective alternative for applications where fast and efficient RBF training is desired.
first_indexed 2024-04-13T06:11:06Z
format Article
id doaj.art-c1c905892a2b43248405046b269c814f
institution Directory Open Access Journal
issn 1424-8220
language English
last_indexed 2024-04-13T06:11:06Z
publishDate 2013-03-01
publisher MDPI AG
record_format Article
series Sensors
spelling doaj.art-c1c905892a2b43248405046b269c814f2022-12-22T02:59:04ZengMDPI AGSensors1424-82202013-03-011333848387710.3390/s130303848Efficient VLSI Architecture for Training Radial Basis Function NetworksWen-Jyi HwangZhe-Cheng FanThis paper presents a novel VLSI architecture for the training of radial basis function (RBF) networks. The architecture contains the circuits for fuzzy C-means (FCM) and the recursive Least Mean Square (LMS) operations. The FCM circuit is designed for the training of centers in the hidden layer of the RBF network. The recursive LMS circuit is adopted for the training of connecting weights in the output layer. The architecture is implemented by the field programmable gate array (FPGA). It is used as a hardware accelerator in a system on programmable chip (SOPC) for real-time training and classification. Experimental results reveal that the proposed RBF architecture is an effective alternative for applications where fast and efficient RBF training is desired.http://www.mdpi.com/1424-8220/13/3/3848reconfigurable computingsystem on programmable chipFPGAradial basis functionfuzzy C-means
spellingShingle Wen-Jyi Hwang
Zhe-Cheng Fan
Efficient VLSI Architecture for Training Radial Basis Function Networks
Sensors
reconfigurable computing
system on programmable chip
FPGA
radial basis function
fuzzy C-means
title Efficient VLSI Architecture for Training Radial Basis Function Networks
title_full Efficient VLSI Architecture for Training Radial Basis Function Networks
title_fullStr Efficient VLSI Architecture for Training Radial Basis Function Networks
title_full_unstemmed Efficient VLSI Architecture for Training Radial Basis Function Networks
title_short Efficient VLSI Architecture for Training Radial Basis Function Networks
title_sort efficient vlsi architecture for training radial basis function networks
topic reconfigurable computing
system on programmable chip
FPGA
radial basis function
fuzzy C-means
url http://www.mdpi.com/1424-8220/13/3/3848
work_keys_str_mv AT wenjyihwang efficientvlsiarchitecturefortrainingradialbasisfunctionnetworks
AT zhechengfan efficientvlsiarchitecturefortrainingradialbasisfunctionnetworks