Design & Implementation of High Switching & Low Phase Noise Frequency Synthesizer

This research describes the design & implementation of frequency synthesizer using single loop Phase lock loop with the following specifications: Frequency range (1.5 2.75) GHz,Step size (1 MHz), Switching time 36.4 µs, & phase noise @10 kHz = -92dBc & spurious -100 dBc <br /> The...

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Main Author: Ali M. N. Hassan
Format: Article
Language:English
Published: Al-Khwarizmi College of Engineering – University of Baghdad 2006-01-01
Series:Al-Khawarizmi Engineering Journal
Online Access:http://www.iasj.net/iasj?func=fulltext&aId=2319
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author Ali M. N. Hassan
author_facet Ali M. N. Hassan
author_sort Ali M. N. Hassan
collection DOAJ
description This research describes the design & implementation of frequency synthesizer using single loop Phase lock loop with the following specifications: Frequency range (1.5 2.75) GHz,Step size (1 MHz), Switching time 36.4 µs, & phase noise @10 kHz = -92dBc & spurious -100 dBc <br /> The development in I.C. technology provide the simplicity in the design of frequency synthesizer because it implements the phase frequency detector(PFD) , prescalar & reference divider in single chip. Therefore our system consists of a single chip contains (low phase noise PFD, charge pump, prescalar & reference divider), voltage controlled oscillator , loop filter & reference oscillator. The single chip is used to provide the following properties :<br />Low power consumptionSmall size, light weight.Flexibility in selecting crystal oscillator frequencies to fit into the system frequency planning.<br />High reliability.The application of this synthesizer in frequency hopping systems, satellite communications & radar because it has high switching speed ,low phase noise & low spurious level.<br />
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spelling doaj.art-c4cb56c2d87e474aa80277164175202c2022-12-21T21:21:02ZengAl-Khwarizmi College of Engineering – University of BaghdadAl-Khawarizmi Engineering Journal1818-11712006-01-01221531Design & Implementation of High Switching & Low Phase Noise Frequency SynthesizerAli M. N. HassanThis research describes the design & implementation of frequency synthesizer using single loop Phase lock loop with the following specifications: Frequency range (1.5 2.75) GHz,Step size (1 MHz), Switching time 36.4 µs, & phase noise @10 kHz = -92dBc & spurious -100 dBc <br /> The development in I.C. technology provide the simplicity in the design of frequency synthesizer because it implements the phase frequency detector(PFD) , prescalar & reference divider in single chip. Therefore our system consists of a single chip contains (low phase noise PFD, charge pump, prescalar & reference divider), voltage controlled oscillator , loop filter & reference oscillator. The single chip is used to provide the following properties :<br />Low power consumptionSmall size, light weight.Flexibility in selecting crystal oscillator frequencies to fit into the system frequency planning.<br />High reliability.The application of this synthesizer in frequency hopping systems, satellite communications & radar because it has high switching speed ,low phase noise & low spurious level.<br />http://www.iasj.net/iasj?func=fulltext&aId=2319
spellingShingle Ali M. N. Hassan
Design & Implementation of High Switching & Low Phase Noise Frequency Synthesizer
Al-Khawarizmi Engineering Journal
title Design & Implementation of High Switching & Low Phase Noise Frequency Synthesizer
title_full Design & Implementation of High Switching & Low Phase Noise Frequency Synthesizer
title_fullStr Design & Implementation of High Switching & Low Phase Noise Frequency Synthesizer
title_full_unstemmed Design & Implementation of High Switching & Low Phase Noise Frequency Synthesizer
title_short Design & Implementation of High Switching & Low Phase Noise Frequency Synthesizer
title_sort design implementation of high switching low phase noise frequency synthesizer
url http://www.iasj.net/iasj?func=fulltext&aId=2319
work_keys_str_mv AT alimnhassan designimplementationofhighswitchinglowphasenoisefrequencysynthesizer