Scalable set of reversible parity gates for integer factorization
Abstract Classical microprocessors operate on irreversible gates, that, when combined with AND, half-adder and full-adder operations, execute complex tasks such as multiplication of integers. We introduce parity versions of all components of a multiplication circuit. The parity gates are reversible...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Nature Portfolio
2023-04-01
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| Series: | Communications Physics |
| Online Access: | https://doi.org/10.1038/s42005-023-01191-3 |