VR-ZYCAP: A Versatile Resourse-Level ICAP Controller for ZYNQ SOC
Hybrid architectures integrating a processor with an SRAM-based FPGA fabric—for example, Xilinx ZynQ SoC—are increasingly being used as a single-chip solution in several market segments to replace multi-chip designs. These devices not only provide advantages in terms of logic density, cost and integ...
Main Authors: | Bushra Sultana, Anees Ullah, Arsalan Ali Malik, Ali Zahir, Pedro Reviriego, Fahad Bin Muslim, Nasim Ullah, Waleed Ahmad |
---|---|
Format: | Article |
Language: | English |
Published: |
MDPI AG
2021-04-01
|
Series: | Electronics |
Subjects: | |
Online Access: | https://www.mdpi.com/2079-9292/10/8/899 |
Similar Items
-
MLP Neural Network Based Gas Classification System on Zynq SoC
by: Xiaojun Zhai, et al.
Published: (2016-01-01) -
HW/SW Co-Design for Dates Classification on Xilinx Zynq SoC
by: Ahmed Chiheb Ammari, et al.
Published: (2020-04-01) -
Design and implementation of partial dynamically reconfigurable FPGA process scheduling
by: Qian Hongwen, et al.
Published: (2023-03-01) -
Evaluation of Cryptographic Algorithms over an all Programmable SoC (AP SoC) Device
by: Iván Gutiérrez Agramont, et al.
Published: (2017-04-01) -
Isolation Design Flow Effectiveness Evaluation Methodology for Zynq SoCs
by: Arsalan Ali Malik, et al.
Published: (2020-05-01)