Steep-Slope and Hysteresis-Free MoS<sub>2</sub> Negative-Capacitance Transistors Using Single HfZrAlO Layer as Gate Dielectric

Steep-Slope and Hysteresis-Free MoS<sub>2</sub> Negative-Capacitance Transistors Using Single HfZrAlO Layer as Gate Dielectric

An effective way to reduce the power consumption of an integrated circuit is to introduce negative capacitance (NC) into the gate stack. Usually, negative-capacitance field-effect transistors (NCFETs) use both a negative-capacitance layer and a positive-capacitance layer as the stack gate, which is...

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Bibliographic Details
Main Authors: Xinge Tao, Lu Liu, Jingping Xu
Format: Article
Language:English
Published: MDPI AG 2022-12-01
Series:Nanomaterials
Subjects:
hafnium zirconium aluminum oxide (HZAO)
negative-capacitance field-effect transistors (NCFETs)
sub-threshold swing (<i>SS</i>)
hysteresis
molybdenum disulfide (MoS<sub>2</sub>)
Online Access:https://www.mdpi.com/2079-4991/12/24/4352

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