Compensating Processing Delay in Excess of One Clock Cycle in Noise Shaping Loops Without Altering the Filter Topology
This work presents an analytical method to design a stable loop filter for a noise shaper with parasitic delays or poles in the loop. This method does not require an increase in the order of the loop or extra feedback paths and keeps the original poles and zeros of the noise-transfer function at the...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
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IEEE
2021-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/9502711/ |
| _version_ | 1818723264718962688 |
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| author | Christiaan E. Lokin Daniel Schinkel Ronan A. R. Van Der Zee Bram Nauta |
| author_facet | Christiaan E. Lokin Daniel Schinkel Ronan A. R. Van Der Zee Bram Nauta |
| author_sort | Christiaan E. Lokin |
| collection | DOAJ |
| description | This work presents an analytical method to design a stable loop filter for a noise shaper with parasitic delays or poles in the loop. This method does not require an increase in the order of the loop or extra feedback paths and keeps the original poles and zeros of the noise-transfer function at the same location. The method has been applied to a low-pass loop filter with a parasitic unit delay and a band-pass loop filter with either three unit delays or a high-frequency pole, obtaining stable loop filters in all three cases. |
| first_indexed | 2024-12-17T21:07:46Z |
| format | Article |
| id | doaj.art-c88ec97876154f5e9f1aef8d7aec0b38 |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-12-17T21:07:46Z |
| publishDate | 2021-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-c88ec97876154f5e9f1aef8d7aec0b382022-12-21T21:32:32ZengIEEEIEEE Access2169-35362021-01-01910810110811110.1109/ACCESS.2021.31015749502711Compensating Processing Delay in Excess of One Clock Cycle in Noise Shaping Loops Without Altering the Filter TopologyChristiaan E. Lokin0https://orcid.org/0000-0001-7940-1883Daniel Schinkel1https://orcid.org/0000-0002-7886-3979Ronan A. R. Van Der Zee2https://orcid.org/0000-0002-2806-6525Bram Nauta3https://orcid.org/0000-0001-6790-5873IC-Design Group, Faculty of Electrical Engineering, Mathematics, and Computer Science, University of Twente, Enschede, NB, The NetherlandsAxign, Enschede, BE, The NetherlandsIC-Design Group, Faculty of Electrical Engineering, Mathematics, and Computer Science, University of Twente, Enschede, NB, The NetherlandsIC-Design Group, Faculty of Electrical Engineering, Mathematics, and Computer Science, University of Twente, Enschede, NB, The NetherlandsThis work presents an analytical method to design a stable loop filter for a noise shaper with parasitic delays or poles in the loop. This method does not require an increase in the order of the loop or extra feedback paths and keeps the original poles and zeros of the noise-transfer function at the same location. The method has been applied to a low-pass loop filter with a parasitic unit delay and a band-pass loop filter with either three unit delays or a high-frequency pole, obtaining stable loop filters in all three cases.https://ieeexplore.ieee.org/document/9502711/Excess loop delay (ELD)loop filternoise shapingsigma-delta analog-to-digital converter (ADC) |
| spellingShingle | Christiaan E. Lokin Daniel Schinkel Ronan A. R. Van Der Zee Bram Nauta Compensating Processing Delay in Excess of One Clock Cycle in Noise Shaping Loops Without Altering the Filter Topology IEEE Access Excess loop delay (ELD) loop filter noise shaping sigma-delta analog-to-digital converter (ADC) |
| title | Compensating Processing Delay in Excess of One Clock Cycle in Noise Shaping Loops Without Altering the Filter Topology |
| title_full | Compensating Processing Delay in Excess of One Clock Cycle in Noise Shaping Loops Without Altering the Filter Topology |
| title_fullStr | Compensating Processing Delay in Excess of One Clock Cycle in Noise Shaping Loops Without Altering the Filter Topology |
| title_full_unstemmed | Compensating Processing Delay in Excess of One Clock Cycle in Noise Shaping Loops Without Altering the Filter Topology |
| title_short | Compensating Processing Delay in Excess of One Clock Cycle in Noise Shaping Loops Without Altering the Filter Topology |
| title_sort | compensating processing delay in excess of one clock cycle in noise shaping loops without altering the filter topology |
| topic | Excess loop delay (ELD) loop filter noise shaping sigma-delta analog-to-digital converter (ADC) |
| url | https://ieeexplore.ieee.org/document/9502711/ |
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