Review, Analysis, and Implementation of Path Selection Strategies for 2D NoCs

Review, Analysis, and Implementation of Path Selection Strategies for 2D NoCs

Recent advances in very-large-scale integration (VLSI) technologies have offered the capability of integrating thousands of processing elements onto a single silicon microchip. Multiprocessor systems-on-chips (MPSoCs) are the latest creation of this technology evolution. As an interconnection networ...

Full description

Bibliographic Details
Main Authors: Rajendra Singh, Manoj Kumar Bohra, Prashant Hemrajani, Anshuman Kalla, Devershi Pallavi Bhatt, Nitin Purohit, Masoud Daneshtalab
Format: Article
Language:English
Published: IEEE 2022-01-01
Series:IEEE Access
Subjects:
Network-on-chip
routing algorithm
congestion
selection methods
traffic distribution
Online Access:https://ieeexplore.ieee.org/document/9973301/

Similar Items

Similar Items