Analysis and Modeling of Mueller–Muller Clock and Data Recovery Circuits

Analysis and Modeling of Mueller–Muller Clock and Data Recovery Circuits

In this paper, an accurate linear model of the Mueller–Muller phase detector (MMPD)-based clock and data recovery circuit (MM-CDR) is proposed, which analyzes several critical points of the MM-CDR including the linearization of the MMPD and the gain of the voter. Using our technique, the jitter betw...

Full description

Bibliographic Details
Main Authors: Tao Liu, Tiejun Li, Fangxu Lv, Bin Liang, Xuqiang Zheng, Heming Wang, Miaomiao Wu, Dechao Lu, Feng Zhao
Format: Article
Language:English
Published: MDPI AG 2021-08-01
Series:Electronics
Subjects:
clock and data recovery
Mueller–Muller phase detector
jitter
jitter tolerance
Online Access:https://www.mdpi.com/2079-9292/10/16/1888

Similar Items

Similar Items