Design and Implementation of High-Performance ECC Processor with Unified Point Addition on Twisted Edwards Curve

With the swift evolution of wireless technologies, the demand for the Internet of Things (IoT) security is rising immensely. Elliptic curve cryptography (ECC) provides an attractive solution to fulfill this demand. In recent years, Edwards curves have gained widespread acceptance in digital signatur...

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Main Authors: Md. Mainul Islam, Md. Selim Hossain, Moh. Khalid Hasan, Md. Shahjalal, Yeong Min Jang
Format: Article
Language:English
Published: MDPI AG 2020-09-01
Series:Sensors
Subjects:
Online Access:https://www.mdpi.com/1424-8220/20/18/5148
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author Md. Mainul Islam
Md. Selim Hossain
Moh. Khalid Hasan
Md. Shahjalal
Yeong Min Jang
author_facet Md. Mainul Islam
Md. Selim Hossain
Moh. Khalid Hasan
Md. Shahjalal
Yeong Min Jang
author_sort Md. Mainul Islam
collection DOAJ
description With the swift evolution of wireless technologies, the demand for the Internet of Things (IoT) security is rising immensely. Elliptic curve cryptography (ECC) provides an attractive solution to fulfill this demand. In recent years, Edwards curves have gained widespread acceptance in digital signatures and ECC due to their faster group operations and higher resistance against side-channel attacks (SCAs) than that of the Weierstrass form of elliptic curves. In this paper, we propose a high-speed, low-area, simple power analysis (SPA)-resistant field-programmable gate array (FPGA) implementation of ECC processor with unified point addition on a twisted Edwards curve, namely Edwards25519. Efficient hardware architectures for modular multiplication, modular inversion, unified point addition, and elliptic curve point multiplication (ECPM) are proposed. To reduce the computational complexity of ECPM, the ECPM scheme is designed in projective coordinates instead of affine coordinates. The proposed ECC processor performs 256-bit point multiplication over a prime field in 198,715 clock cycles and takes 1.9 ms with a throughput of 134.5 kbps, occupying only 6543 slices on Xilinx Virtex-7 FPGA platform. It supports high-speed public-key generation using fewer hardware resources without compromising the security level, which is a challenging requirement for IoT security.
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spelling doaj.art-cf3ed541edbf46ca8788531541ac50662023-11-20T13:09:36ZengMDPI AGSensors1424-82202020-09-012018514810.3390/s20185148Design and Implementation of High-Performance ECC Processor with Unified Point Addition on Twisted Edwards CurveMd. Mainul Islam0Md. Selim Hossain1Moh. Khalid Hasan2Md. Shahjalal3Yeong Min Jang4Department of Electronics Engineering, Kookmin University, Seoul 02707, KoreaDepartment of Electrical and Electronic Engineering, Khulna University of Engineering & Technology (KUET), Khulna 9203, BangladeshDepartment of Electronics Engineering, Kookmin University, Seoul 02707, KoreaDepartment of Electronics Engineering, Kookmin University, Seoul 02707, KoreaDepartment of Electronics Engineering, Kookmin University, Seoul 02707, KoreaWith the swift evolution of wireless technologies, the demand for the Internet of Things (IoT) security is rising immensely. Elliptic curve cryptography (ECC) provides an attractive solution to fulfill this demand. In recent years, Edwards curves have gained widespread acceptance in digital signatures and ECC due to their faster group operations and higher resistance against side-channel attacks (SCAs) than that of the Weierstrass form of elliptic curves. In this paper, we propose a high-speed, low-area, simple power analysis (SPA)-resistant field-programmable gate array (FPGA) implementation of ECC processor with unified point addition on a twisted Edwards curve, namely Edwards25519. Efficient hardware architectures for modular multiplication, modular inversion, unified point addition, and elliptic curve point multiplication (ECPM) are proposed. To reduce the computational complexity of ECPM, the ECPM scheme is designed in projective coordinates instead of affine coordinates. The proposed ECC processor performs 256-bit point multiplication over a prime field in 198,715 clock cycles and takes 1.9 ms with a throughput of 134.5 kbps, occupying only 6543 slices on Xilinx Virtex-7 FPGA platform. It supports high-speed public-key generation using fewer hardware resources without compromising the security level, which is a challenging requirement for IoT security.https://www.mdpi.com/1424-8220/20/18/5148elliptic curve cryptography (ECC)elliptic curve point multiplication (ECPM)twisted Edwards curveunified point additionsimple power analysis (SPA) attacks
spellingShingle Md. Mainul Islam
Md. Selim Hossain
Moh. Khalid Hasan
Md. Shahjalal
Yeong Min Jang
Design and Implementation of High-Performance ECC Processor with Unified Point Addition on Twisted Edwards Curve
Sensors
elliptic curve cryptography (ECC)
elliptic curve point multiplication (ECPM)
twisted Edwards curve
unified point addition
simple power analysis (SPA) attacks
title Design and Implementation of High-Performance ECC Processor with Unified Point Addition on Twisted Edwards Curve
title_full Design and Implementation of High-Performance ECC Processor with Unified Point Addition on Twisted Edwards Curve
title_fullStr Design and Implementation of High-Performance ECC Processor with Unified Point Addition on Twisted Edwards Curve
title_full_unstemmed Design and Implementation of High-Performance ECC Processor with Unified Point Addition on Twisted Edwards Curve
title_short Design and Implementation of High-Performance ECC Processor with Unified Point Addition on Twisted Edwards Curve
title_sort design and implementation of high performance ecc processor with unified point addition on twisted edwards curve
topic elliptic curve cryptography (ECC)
elliptic curve point multiplication (ECPM)
twisted Edwards curve
unified point addition
simple power analysis (SPA) attacks
url https://www.mdpi.com/1424-8220/20/18/5148
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